LG Semicon
GM72V66841CT/CLT
Relationship Between Frequency and Minimum Latency
- 7K
100
10
- 7J
- 8
- 10K
100
Parameter
frequency(MHz)
100
10
66
15
125
8
83
12
66
15
Symbol
Notes
t
CK (ns)
10
3
Active command to column
command (same bank)
Active command to active
command (same bank)
Active command to Precharge
command (same bank)
Precharge command to active
command (same bank)
Write recovery or last data-in to
Precharge command (same bank)
Active command to active
command (different bank)
2
7
5
2
1
2
7
5
2
1
2
6
4
2
1
3
9
6
3
2
2
6
4
2
1
2
6
4
2
1
1
lRCD
= [lRAS
+lRP], 1
9
6
3
1
lRC
1
1
1
1
lRAS
lRP
lRWL
2
1
3
2
1
3
2
1
3
2
1
5
2
1
3
2
1
4
2
1
3
lRRD
Self refresh exit time
lSREX
Last data in to active command
(Auto Precharge, same bank)
Self refresh exit to command
input
= [lRWL
+lRP], 1
lAPW
9
9
6
9
6
9
6
= [lRC]
lSEC
Precharge
command to
high impedance
2
3
-
2
3
-
2
3
-
2
3
(CL=2)
l
HZP
3
3
3
(CL=3)
lHZP
Last data out to active
command
(auto Precharge) (same bank)
1
1
1
1
1
1
1
lAPR
Last data out to
Precharge
(early Precharge)
- 1
- 2
-
- 1
- 2
-
- 1
- 2
-
- 1
- 2
(CL=2)
l
EP
- 2
-2
-2
(CL=3)
lEP
Column command to column
command
Write command to data in
latency
1
0
1
0
1
0
1
0
1
0
1
0
1
0
l
CCD
lWCD
0
2
1
1
0
0
2
1
1
0
0
2
1
1
0
0
2
1
1
0
0
2
1
1
0
0
2
1
1
0
0
2
1
1
0
DQM to data in
l
DID
DQM to data out
lDOD
CKE to CLK disable
Register set to active command
CS to command disable
l
CLE
RSA
l
lCDD
Power down exit to command
input
1
1
1
1
1
1
1
lPEC
42
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