Table 7. Logic Allocation for MACH211(SP) and MACH231(SP)
Macrocell
Output Buried
Macrocell
Available Clusters
C , C , C
Output
Buried
Available Clusters
C , C , C , C
M
M
8
0
0
1
2
7
8
9
10
M
C , C , C , C
M
C , C , C , C
8 9 10 11
1
0
1
2
3
9
M
C , C , C , C
M
C , C , C , C
9 10 11 12
2
1
2
3
4
10
M
C , C , C , C
M
C , C , C , C
10 11 12 13
3
2
3
4
5
11
M
C , C , C , C
M
C , C , C , C
11 12 13 14
4
3
4
5
6
12
M
C , C , C , C
M
C , C , C , C
12 13 14 15
5
4
5
6
7
13
M
C , C , C , C
M
C , C , C
13 14 15
6
5
6
7
8
14
M
C , C , C , C
M
C , C
7
6
7
8
9
15
14 15
Table 8. Logic Allocation for MACH221(SP)
Macrocell
Output Buried
Macrocell
Available Clusters
C , C , C
Output
Buried
Available Clusters
M
M
C , C , C , C
5 6 7 8
0
0
1
2
6
M
C , C , C , C
M
C , C , C , C
6 7 8 9
1
0
1
2
3
7
M
C , C , C , C
M
C , C , C , C
7 8 9 10
2
1
2
3
4
8
M
C , C , C , C
M
C , C , C , C
8 9 10 11
3
2
3
4
5
9
M
C , C , C , C
M
C , C , C
9 10 11
4
3
4
5
6
10
M
C , C , C , C
M
C , C
10 11
5
4
5
6
7
11
Macrocell
There are two fundamental types of macrocell: the output macrocell and the buried macrocell. The
buried macrocell is only found in MACH 2 devices. The use of buried macrocells effectively
doubles the number of macrocells available without increasing the pin count.
Both macrocell types can generate registered or combinatorial outputs. For the MACH 2 series,
a transparent-low latch configuration is provided. If the register is used, it can be configured as
a T-type or a D-type flip-flop. Register and latch functionality is defined in Table 9.
Programmable polarity (for output macrocells) and the T-type flip-flop both give the software a
way to minimize the number of product terms needed. These choices can be made automatically
by the software when it fits the design into the device.
Table 9. Register/Latch Operation
Configuration
D/T
X
0
CLK/LE
Q+
Q
0
0,1,↓
D-Register
↑
1
↑
1
X
0
0,1,↓
Q
Q
Q
Q
0
T-Register
Latch
↑
↑
1
0
0
1
X
0
1
1
MACH 1 & 2 Families
7
LATTICE [ LATTICE SEMICONDUCTOR ]
