Pinout Information
LatticeECP/EC Family Data Sheet
Lattice Semiconductor
LFEC1, LFEC3 Logic Signal Connections: 100 TQFP
LFEC1
LFEC3
LVDS
Pin
Number
Pin
Function
Pin
Function
Bank
LVDS
Dual Function
Bank
Dual Function
GND0
GND7
GND0
GND7
1*
-
-
2
VCCIO7
PL2A
PL2B
PL3A
PL3B
PL4A
PL4B
PL5A
PL5B
XRES
VCC
7
7
7
7
7
7
7
7
7
6
-
VCCIO7
PL2A
PL2B
PL7A
PL7B
PL8A
PL8B
PL9A
PL9B
XRES
VCC
7
7
7
7
7
7
7
7
7
6
-
3
T
C
T
VREF2_7
VREF1_7
T
C
T
VREF2_7
VREF1_7
4
5
6
C
T
C
T
7
8
C
T
C
T
9
PCLKT7_0
PCLKC7_0
PCLKT7_0
PCLKC7_0
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
C
C
TCK
6
-
TCK
6
-
GND
GND
TDI
6
6
6
6
6
6
6
6
6
6
TDI
6
6
6
6
6
6
6
6
6
6
TMS
TMS
TDO
TDO
VCCJ
PL7A
PL7B
PL8A
PL8B
PL14A
VCCIO6
VCCJ
PL11A
PL11B
PL12A
PL12B
PL18A
VCCIO6
T
C
T
LLM0_PLLT_IN_A
LLM0_PLLC_IN_A
LLM0_PLLT_FB_A
LLM0_PLLC_FB_A
VREF1_6
T
C
T
LUM0_PLLT_IN_A
LUM0_PLLC_IN_A
LUM0_PLLT_FB_A
LUM0_PLLC_FB_A
VREF1_6
C
C
GND5
GND6
GND5
GND6
25*
-
-
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
VCCIO5
PB2A
5
5
5
5
5
5
5
5
5
5
5
-
VCCIO5
PB10A
PB10B
PB11A
PB11B
PB14A
PB16A
PB16B
PB17A
GND5
5
5
5
5
5
5
5
5
5
5
5
-
T
C
T
T
C
T
PB2B
PB3A
PB3B
C
C
PB6A
BDQS6
VREF2_5
VREF1_5
PCLKT5_0
BDQS14
VREF2_5
VREF1_5
PCLKT5_0
PB8A
T
C
T
T
C
T
PB8B
PB9A
GND5
PB9B
C
PCLKC5_0
PB17B
VCCAUX
VCCIO4
PB18A
PB18B
C
PCLKC5_0
VCCAUX
VCCIO4
PB10A
PB10B
4
4
4
4
4
4
T
WRITEN
CS1N
T
WRITEN
CS1N
C
C
4-8
LATTICE [ LATTICE SEMICONDUCTOR ]
