Pinout Information
LatticeECP/EC Family Data Sheet
Lattice Semiconductor
LFEC1, LFEC3 Logic Signal Connections: 100 TQFP (Cont.)
LFEC1
LFEC3
Pin
Pin
Pin
Number
Function
Bank
LVDS
Dual Function
VREF1_4
CSN
Function
Bank
LVDS
Dual Function
VREF1_4
CSN
41
42
43
44
45
46
47
48
49
50
PB11A
PB11B
PB12B
PB13A
PB13B
PB14A
PB14B
PB15B
PB16B
PB17B
4
4
4
4
4
4
4
4
4
4
T
PB19A
PB19B
PB20B
PB21A
PB21B
PB22A
PB22B
PB23B
PB24B
PB25B
4
4
4
4
4
4
4
4
4
4
T
C
C
D0/SPID7
D2/SPID5
D1/SPID6
BDQS14
D0/SPID7
D2/SPID5
D1/SPID6
BDQS22
T
C
T
T
C
T
C
D3/SPID4
D4/SPID3
D5/SPID2
D6/SPID1
C
D3/SPID4
D4/SPID3
D5/SPID2
D6/SPID1
GND3
GND4
GND3
GND4
51*
-
-
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
PR10B
PR10A
PR9B
3
3
3
3
3
3
3
3
3
3
3
3
-
C
T
C
T
RLM0_PLLC_FB_A
RLM0_PLLT_FB_A
RLM0_PLLC_IN_A
RLM0_PLLT_IN_A
PR14B
PR14A
PR13B
PR13A
VCCIO3
PR12B
PR12A
PR11B
PR11A
CFG2
3
3
3
3
3
3
3
3
3
3
3
3
-
C
T
C
T
RLM0_PLLC_FB_A
RLM0_PLLT_FB_A
RLM0_PLLC_IN_A
RLM0_PLLT_IN_A
PR9A
VCCIO3
PR8B
C
T
C
T
DI/CSSPIN
DOUT/CSON
BUSY/SISPI
D7/SPID0
C
T
C
T
DI/CSSPIN
DOUT/CSON
BUSY/SISPI
D7/SPID0
PR8A
PR7B
PR7A
CFG2
CFG1
CFG1
CFG0
CFG0
VCC
VCC
PROGRAMN
CCLK
3
3
3
-
PROGRAMN
CCLK
3
3
3
-
INITN
INITN
GND
GND
DONE
PR5B
3
2
2
2
2
2
1
1
1
1
1
1
1
DONE
PR9B
3
2
2
2
2
2
1
1
1
1
1
1
1
C
T
PCLKC2_0
PCLKT2_0
VREF1_2
C
T
PCLKC2_0
PCLKT2_0
VREF1_2
PR5A
PR9A
PR2B
PR2B
VCCIO2
GND2
PT17B
PT17A
PT14B
PT14A
PT13A
PT12B
PT12A
VCCIO2
GND2
C
T
C
T
PT25B
PT25A
PT22B
PT22A
PT21A
PT20B
PT20A
C
T
C
T
TDQS14
TDQS22
C
T
C
T
4-9
LATTICE [ LATTICE SEMICONDUCTOR ]
