Specifications GAL16VP8
Simple Mode
In the Simple mode, macrocells are configured as dedicated inputs Pins 1 and 10 are always available as data inputs into the AND
or as dedicated, always active, combinatorial outputs.
array. The center two macrocells (pins 14 & 16) cannot be used
in the input configuration.
All outputs in the simple mode have a maximum of eight product
terms that can control the logic. In addition, each output has pro- The JEDEC fuse numbers including the UES fuses and PTD fuses
grammable polarity.
are shown on the logic diagram.
Combinatorial Output with Feedback Configuration
for Simple Mode
Vcc
- SYN=1.
- AC0=0.
- XOR=0 defines Active Low Output.
- XOR=1 defines Active High Output.
- AC1=0 defines this configuration.
- AC2=1 defines totem pole output.
- AC2=0 defines open-drain output.
- All OLMC except pins 14 & 16 can be configured to
this function.
XOR
Combinatorial Output Configuration for Simple Mode
Vcc
- SYN=1.
- AC0=0.
- XOR=0 defines Active Low Output.
- XOR=1 defines Active High Output.
- AC1=0 defines this configuration.
- AC2=1 defines totem pole output.
- AC2=0 defines open-drain output.
- Pins 14 & 16 are permanently configured to this
function.
XOR
Dedicated Input Configuration for Simple Mode
- SYN=1.
- AC0=0.
- XOR=0 defines Active Low Output.
- XOR=1 defines Active High Output.
- AC1=1 defines this configuration.
- AC2=1 defines totem pole output.
- AC2=0 defines open-drain output.
- All OLMC except pins 14 & 16 can be configured to
this function.
Note: The development software configures all of the architecture control bits and checks for proper pin usage automatically.
8
LATTICE [ LATTICE SEMICONDUCTOR ]
