Specifications ispLSI 8840
The Global OE signals and Test OE signal are driven
from the dedicated external control input pins.
Output Control Organization
In addition to the data input and output to the I/O cells,
each I/O cell can have up to six different I/O cell control
signals. In addition to the internal OE control, the five
control signals for each I/O cell consist of pin OE control,
clockenable,clockinput,asynchronouspresetandasyn-
chronousreset. AlloftheI/Ocontrolsignalscanbedriven
either from the dedicated external input pins or from the
internal control bus.
The16-bitwideoutputcontrolbusesareorganizedinfour
different quadrants as shown in Figure 5. Since each
GLB is capable of generating the output control signals,
each of the output control bus signals can be driven from
a unique GLB. The 42 GLBs can generate a total of 42
unique I/O control signals. Referring to Figure 2, the GLB
generates its output control signal from control product
term (PT81).
The output enable of each I/O cell can be driven by 21
different sources – 16 from the output control bus, four
from the Global OE pins and one from the Test OE pin.
Figure 5 also illustrates how the quadrant clocks are
routed to the appropriate quadrant I/O cells.
Figure 5. Output Control Bus and Quadrant Organization
Quadrant 0, 16-Bit Wide Output Control Bus
(I/O B0-B6 <0-11>, QIOCLK0)
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Output
Control
From PT81
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(see Figure 2)
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(I/O
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Quadrant 2, 16-Bit Wide Output Control Bus
(I/O B0-B6 <12-23>, QIOCLK2)
OE Bus.eps
8
LATTICE [ LATTICE SEMICONDUCTOR ]
