Specifications ispGDX80VA
Figure 3. Adjacent I/O Cells vs. Direct Input Path for
ispGDX80VA, I/O D13
Special Features
Slew Rate Control
ispGDX80VA I/O Cell
I/O Group A
All output buffers contain a programmable slew rate
control that provides software-selectable slew rate op-
tions.
D11 MUX Out
S1 S0
I/O Group B
.m0
Open Drain Control
4 x 4
Crossbar
Switch
D12 MUX Out
I/O Group C
.m1
.m2
D13
All output buffers provide a programmable Open-Drain
option which allows the user to drive system level reset,
interrupt and enable/disable lines directly without the
needforanoff-chipOpen-DrainorOpen-Collectorbuffer.
Wire-OR logic functions can be performed at the printed
circuit board level.
.m3
D14 MUX Out
I/O Group D
D15 MUX Out
It can be seen from Figure 3 that if the D11 adjacent I/O
cell is used, the I/O group “A” input is no longer available
as a direct MUX input.
Pull-up Resistor
All pins have a programmable active pull-up. A typical
resistor value for the pull-up ranges from 50kΩ to 80kΩ.
The ispGDXVA can implement MUXes up to 16 bits wide
in a single level of logic, but care must be taken when
combining adjacent I/O cell outputs with direct MUX
inputs.AnyparticularcombinationofadjacentI/Ocellsas
MUX inputs will dictate what I/O groups (A, B, C or D) can
be routed to the remaining inputs. By properly choosing
the adjacent I/O cells, all of the MUX inputs can be
utilized.
Output Latch (Bus Hold)
All pins have a programmable circuit that weakly holds
the previously driven state when all drivers connected to
the pin (including the pin's output driver as well as any
other devices connected to the pin by external bus) are
tristated.
Table 2. Adjacent I/O Cells (Mapping of
ispGDX80VA)
User-Programmable I/Os
The ispGDX80VA features user-programmable
I/Os supporting either 3.3V or 2.5V output voltage level
options. The ispGDX80VA uses a VCCIO pin to provide
the 2.5V reference voltage when used.
Data A/ Data B/ Data C/ Data D/
MUXOUT MUXOUT MUXOUT MUXOUT
B10
B11
B12
B13
D6
B12
B13
B14
B15
D8
B11
B12
B13
B14
D7
B9
B10
B11
B12
D5
B8
B9
B10
B11
D4
PCI Compatible Drive Capability
Reflected
I/O Cells
The ispGDX80VA supports PCI compatible drive capa-
bility for all I/Os.
D7
D9
D8
D6
D5
D8
D10
D11
D8
D9
D7
D6
D9
D10
D9
D8
D7
D10
D11
D12
D13
B6
D11
D12
D13
D14
B7
D12
D13
D14
D15
B8
D9
D10
D11
D12
B5
D10
D11
B4
Normal
I/O Cells
B7
B5
B6
B8
B9
B8
B6
B7
B9
B10
B11
B9
B7
B8
B10
5
LATTICE [ LATTICE SEMICONDUCTOR ]
