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5256VA 参数 Datasheet PDF下载

5256VA图片预览
型号: 5256VA
PDF下载: 下载PDF文件 查看货源
内容描述: 在系统可编程3.3V SuperWIDE⑩高密度PLD [In-System Programmable 3.3V SuperWIDE⑩ High Density PLD]
分类和应用:
文件页数/大小: 25 页 / 311 K
品牌: LATTICE [ LATTICE SEMICONDUCTOR ]
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Specifications ispLSI 5256VA  
Power Consumption  
Power consumption in the ispLSI 5256VA device de- on the complete group of four. The fast high-speed”  
pends on two primary factors: the speed at which the setting operates product terms at their normal full power  
device is operating and the number of product terms consumption. For portions of the logic that can tolerate  
used. The product terms have a fuse-selectable speed/ longer propagation delays, selecting the slower low-  
power tradeoff setting. Each group of four product terms powersetting will significantly reduce the power  
has a single speed/power tradeoff control fuse that acts dissipation for these product terms. Figure 10 shows the  
relationship between power and operating speed.  
Figure 10. Typical Device Power Consumption vs fmax  
400  
350  
300  
250  
200  
150  
100  
ispLSI 5256VA  
High Speed Mode  
ispLSI 5256VA  
Low Power Mode  
0
20  
40  
60  
80  
100  
120  
140  
fmax (MHz)  
Notes: Configuration of 16 16-bit Counters  
Typical Current at 3.3V, 25° C  
I
can be estimated for the ispLSI 5256VA using the following equation:  
CC  
High Speed Mode: ICC = 30 + (# of PTs * 0.456) + (# of nets * Max. freq * 0.0039)  
Low Power Mode: ICC = 30 + (# of PTs * 0.22) + (# of nets * Max. freq * 0.0039)  
# of PTs = Number of Product Terms used in design  
# of nets = Number of Signals used in device  
Max. freq = Highest Clock Frequency to the device  
The I  
CC  
estimate is based on typical conditions (V  
CC  
= 3.3V, room temperature) and an assumption of 2 GLB loads  
is sensitive to operating conditions  
on average exists. These values are for estimates only. Since the value of I  
CC  
and the program in the device, the actual I  
CC  
should be verified.  
0127/5256va  
16  
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