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3256E 参数 Datasheet PDF下载

3256E图片预览
型号: 3256E
PDF下载: 下载PDF文件 查看货源
内容描述: 在系统可编程高密度PLD [In-System Programmable High Density PLD]
分类和应用:
文件页数/大小: 15 页 / 159 K
品牌: LATTICE [ LATTICE SEMICONDUCTOR ]
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Specifications
ispLSI 3256E
Switching Test Conditions
Input Pulse Levels
Input Rise and Fall Time
Input Timing Reference Levels
Output Timing Reference Levels
Output Load
3-state levels are measured 0.5V from
steady-state active level.
GND to 3.0V
3ns 10% to 90%
1.5V
1.5V
See Figure 2
Table 2-0003/3256E
Figure 2. Test Load
+ 5V
R1
Device
Output
R2
CL
*
Test
Point
Output Load conditions (See Figure 2)
*
CL includes Test Fixture and Probe Capacitance.
TEST CONDITION
A
B
Active High
Active Low
Active High to Z
at
V
OH
-0.5V
Active Low to Z
at
V
OL
+0.5V
R1
470Ω
470Ω
470Ω
R2
390Ω
390Ω
390Ω
390Ω
390Ω
CL
35pF
35pF
35pF
5pF
5pF
Table 2 - 0004A
0213A
C
DC Electrical Characteristics
Over Recommended Operating Conditions
SYMBOL
PARAMETER
Output Low Voltage
Output High Voltage
Input or I/O Low Leakage Current
Input or I/O High Leakage Current
Bscan/ispEN Input Low Leakage Current
I/O Active Pull-Up Current
Output Short Circuit Current
Operating Power Supply Current
CONDITION
I
OL
= 8 mA
I
OH
= -4 mA
0V
V
IN
V
IL
(Max.)
3.5V
V
IN
V
CC
0V
V
IN
V
IL
0V
V
IN
V
IL
V
CC
= 5V, V
OUT
= 0.5V
V
IL
= 0.0V, V
IH
= 3.0V
f
TOGGLE
= 1 MHz
MIN.
2.4
TYP.
300
3
MAX. UNITS
0.4
-10
10
-150
-150
-200
V
V
µA
µA
µA
µA
mA
mA
V
OL
V
OH
I
IL
I
IH
I
IL-isp
I
IL-PU
I
OS
1
I
CC
2,4
Table 2 - 0007isp/3256E
1. One output at a time for a maximum duration of one second. V
OUT
= 0.5V was selected to avoid test problems
by tester ground degradation. Characterized but not 100% tested.
2. Measured using sixteen 16-bit counters.
3. Typical values are at V
CC
= 5V and T
A
= 25°C.
4. Maximum I
CC
varies widely with specific device configuration and operating frequency. Refer to the Power Consumption
section of this datasheet and Thermal Management section of the Lattice Semiconductor Data Book or CD-ROM to estimate
maximum I
CC
.
5