ML145050, ML145051
LANSDALE Semiconductor, Inc.
DC ELECTRICAL CHARACTERISTICS
(Voltages Referenced to V , Full Temperature and Voltage Ranges per Operation Ranges Table, unless otherwise indicated)
SS
Guaranteed
Limit
Symbol
Parameter
Test Condition
Unit
V
IH
Minimum High-Level Input Voltage
(D , SCLK, CS, ADCLK)
in
2.0
V
V
Maximum Low-Level Input Voltage
(D , SCLK, CS, ADCLK)
in
0.8
2.4
V
V
IL
V
OH
Minimum High-Level Output Voltage
(D , EOC)
out
I
I
= – 1.6 mA
= – 20 µA
out
out
V
– 0.1
DD
V
OL
Minimum Low-Level Output Voltage
(D , EOC)
out
I
I
= + 1.6 mA
= 20 µA
0.4
0.1
V
out
out
I
in
Maximum Input Leakage Current
(D , SCLK, CS, ADCLK)
in
V
in
= V
or V
+ 2.5
µA
SS
DD
I
Maximum Three-State Leakage Current (D
Maximum Power Supply Current
)
V
= V
or V
+ 10
2.5
µA
mA
µA
µA
OZ
out
out
SS
DD
I
V
in
= V
or V , All Outputs Open
SS
DD
DD
= V
SS
I
Maximum Static Analog Reference Current (V
)
V
ref
= V , V
100
+ 1
ref
ref
DD AG
to V
DD
I
Maximum Analog Mux Input Leakage Current between all
deselected inputs and any selected input (AN0 AN10)
V
Al
= V
Al
SS
A/D CONVERTER ELECTRICAL CHARACTERISTICS
(Full Temperature and Voltage Ranges per Operation Ranges Table; ML145050: 500 kHz ≤ ADCLK ≤ 2.1 MHz, unless otherwise noted)
Guaranteed
Limit
10
1
Characteristic
Resolution
Definition and Test Conditions
Number of bits resolved by the A/D converter
Unit
Bits
LSB
LSB
Maximum Nonlinearity
Maximum Zero Error
Maximum difference between an ideal and an actual ADC transfer function
Difference between the maximum input voltage of an ideal and an actual
ADC for zero output code
1
Maximum Full-Scale Error
Difference between the minimum input voltage of an ideal and an actual
ADC for full-scale output code
1
LSB
Maximum Total Unadjusted Error
Maximum Quantization Error
Absolute Accuracy
Maximum sum of nonlinearity, zero error, and full-scale error
Uncertainty due to converter resolution
1
LSB
LSB
LSB
1/2
Difference between the actual input voltage and the full-scale weighted
equivalent of the binary output code, all error sources included
1-1/2
Maximum Conversion Time
Total time to perform a single analog-to-digital conversion
ML145050
ML145051
44
ADCLK
cycles
µs
44
Data Transfer Time
Total time to transfer digital serial data into and out of the device
Analog input acquisition time window
10 to 16
SCLK
cycles
Sample Acquisition Time
Minimum Total Cycle Time
6
SCLK
cycles
Total time to transfer serial data, sample the analog input, and perform the
conversion
µs
26
49
ML145050: ADCLK = 2.1 MHz, SCLK = 2.1 MHz
ML145051: SCLK = 2.1 MHz
Maximum Sample Rate
Rate at which analog inputs may be sampled
ML145050: ADCLK = 2.1 MHz, SCLK = 2.1 MHz
ML145051: SCLK = 2.1 MHz
ks/s
38
20.4
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