IC61C1024
IC61C1024L
128K x 8 HIGH-SPEED
CMOS STATIC RAM
DESCRIPTION
FEATURES
The ICSI IC61C1024 and IC61C1024L are very high-speed,
low power, 131,072-word by 8-bit CMOS static RAMs. They
are fabricated using ICSI's high-performance CMOS
technology. This highly reliable process coupled with innovative
circuit design techniques, yields higher performance and low
power consumption devices.
• High-speed access time: 12, 15, 20, 25 ns
• Low active power: 600 mW (typical)
• Low standby power: 500 µW (typical) CMOS
standby
• Output Enable (OE) and two Chip Enable
(CE1 and CE2) inputs for ease in applications
• Fully static operation: no clock or refresh
When CE1 is HIGH or CE2 is LOW (deselected), the device
assumes a standby mode at which the power dissipation can
be reduced by using CMOS input levels.
required
Easy memory expansion is provided by using two Chip Enable
inputs, CE1 and CE2. The active LOW Write Enable (WE)
controls both writing and reading of the memory.
• TTL compatible inputs and outputs
• Single 5V (±10%) power supply
• Low power version available: IC61C1024L
The IC61C1024 and IC61C1024L are available in 32-pin
300mil SOJ, and 8*20mm TSOP-1, and 8*13.4mm TSOP-1
packages.
• Commercial and industrial temperature ranges
available
FUNCTIONAL BLOCK DIAGRAM
512 x 2048
MEMORY ARRAY
A0-A16
DECODER
VCC
GND
I/O
DATA
COLUMN I/O
I/O0-I/O7
CIRCUIT
CE1
CE2
CONTROL
CIRCUIT
OE
WE
ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors
which may appear in this publication. © Copyright 2000, Integrated Circuit Solution Inc.
2
Integrated Circuit Solution Inc.
AHSR008-0B 10/18/2001
ISSI [ INTEGRATED SILICON SOLUTION, INC ]
