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IC43R16320B-6TL 参数 Datasheet PDF下载

IC43R16320B-6TL图片预览
型号: IC43R16320B-6TL
PDF下载: 下载PDF文件 查看货源
内容描述: [DDR DRAM, 32MX16, 0.7ns, CMOS, PDSO66, ROHS COMPLIANT, PLASTIC, TSOP2-66]
分类和应用: 动态存储器双倍数据速率光电二极管内存集成电路
文件页数/大小: 48 页 / 839 K
品牌: ISSI [ INTEGRATED SILICON SOLUTION, INC ]
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IS43R16320B  
IC43R16320B  
Command Operation  
Command Truth Table  
DDR SDRAM recognize the following commands specified by the /CS, /RAS, /CAS, /WE and address pins. All other  
combinations than those in the table below are illegal.  
CKE  
Command  
Symbol  
DESL  
NOP  
n – 1  
H
n
/CS /RAS /CAS /WE BA1 BA0 AP  
Address  
Ignore command  
H
H
H
H
H
H
H
H
H
H
H
L
H
L
L
L
L
L
L
L
L
L
L
L
L
L
×
×
×
×
×
×
V
V
V
V
V
V
×
×
×
L
L
×
×
×
×
L
H
L
H
V
L
H
×
×
L
L
×
No operation  
H
H
H
H
H
H
H
L
H
H
L
H
L
×
×
Burst stop in read command  
Column address and read command  
Read with auto-precharge  
Column address and write command  
Write with auto-precharge  
Row address strobe and bank active  
Precharge select bank  
Precharge all bank  
BST  
H
×
×
READ  
READA  
WRIT  
WRITA  
ACT  
H
H
H
L
V
V
V
V
V
V
×
V
V
V
V
V
×
H
L
H
L
H
L
L
H
H
H
H
L
H
L
PRE  
H
L
PALL  
REF  
H
L
L
×
Refresh  
H
L
H
H
L
×
×
SELF  
MRS  
H
L
L
×
×
Mode register set  
H
H
H
L
L
L
V
V
EMRS  
H
L
L
L
H
Remark: H: VIH. L: VIL. ×: VIH or VIL V: Valid address input  
Note: The CKE level must be kept for 1 CK cycle at least.  
Ignore command [DESL]  
When /CS is high at the cross point of the CK rising edge and the VREF level, every input are neglected and internal  
status is held.  
No operation [NOP]  
As long as this command is input at the cross point of the CK rising edge and the VREF level, address and data  
input are neglected and internal status is held.  
Burst stop in read operation [BST]  
This command stops a burst read operation, which is not applicable for a burst write operation.  
Column address strobe and read command [READ]  
This command starts a read operation. The start address of the burst read is determined by the column address  
(See “Address Pins Table” in Pin Function) and the bank select address. After the completion of the read operation,  
the output buffer becomes high-Z.  
Read with auto-precharge [READA]  
This command starts a read operation. After completion of the read operation, precharge is automatically executed.  
Column address strobe and write command [WRIT]  
This command starts a write operation. The start address of the burst write is determined by the column address  
(See “Address Pins Table” in Pin Function) and the bank select address.  
Write with auto-precharge [WRITA]  
This command starts a write operation. After completion of the write operation, precharge is automatically executed.  
14  
Integrated Silicon Solution, Inc. — www.issi.com  
Rev. 00B  
06/11/08  
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