IS42S16100E, IC42S16100E
OPERATING FREQUENCY / LATENCY RELATIONSHIPS
SYMBOL
—
—
t
cac
t
rcd
t
rac
t
rc
t
ras
t
rp
t
rrd
t
ccd
t
dpl
t
dal
t
rbd
t
wbd
t
rql
t
wdl
t
pql
t
qmd
t
dmd
t
mcd
PARAMETER
Clock Cycle Time
Operating Frequency
CAS
Latency
Active Command To Read/Write Command Delay Time
RAS
Latency (t
rcd
+ t
cac
)
Command Period (REF to REF / ACT to ACT)
Command Period (ACT to PRE)
Command Period (PRE to ACT)
Command Period (ACT[0] to ACT [1])
Column Command Delay Time
(READ, READA, WRIT, WRITA)
Input Data To Precharge Command Delay Time
Input Data To Active/Refresh Command Delay Time
(During Auto-Precharge)
Burst Stop Command To Output in HIGH-Z Delay Time
(Read)
Burst Stop Command To Input in Invalid Delay Time
(Write)
Precharge Command To Output in HIGH-Z Delay Time
(Read)
Precharge Command To Input in Invalid Delay Time
(Write)
Last Output To Auto-Precharge Start Time (Read)
DQM To Output Delay Time (Read)
DQM To Input Delay Time (Write)
Mode Register Set To Command Delay Time
-5
5
200
3
3
6
9
6
3
2
1
2
5
3
0
3
0
-2
2
0
2
-6
6
166
3
3
6
9
6
3
2
1
2
5
3
0
3
0
–2
2
0
2
-7
7
143
3
3
6
9
6
3
2
1
2
5
3
0
3
0
–1
2
0
2
UNITS
ns
MHz
cycle
cycle
cycle
cycle
cycle
cycle
cycle
cycle
cycle
cycle
cycle
cycle
cycle
cycle
cycle
cycle
cycle
cycle
AC TEST CONDITIONS
(Input/Output Reference Level: 1.4V)
Output Load
Input
t
CHI
2.8V
t
CK
t
CL
CLK
1.4V
0.0V
2.8V
50
Ω
I/O
+1.4V
50 pF
t
CS
t
CH
INPUT
1.4V
0.0V
t
OH
t
AC
1.4V
1.4V
OUTPUT
8
Integrated Silicon Solution, Inc. — www.issi.com
Rev. C
01/22/08
ISSI [ INTEGRATED SILICON SOLUTION, INC ]
