AS7C33512NTF18A
®
Timing characteristics over operating range
-65
-75
1
Parameter
Cycle time
Sym
Min Max Min Max
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
7.5
-
-
8.5
-
-
CYC
CD
Clock access time
6.5
7.5
Output enable low to data valid
Clock high to output low Z
Data Output invalid from clock high
Output enable low to output low Z
Output enable high to output high Z
Clock high to output high Z
Output enable high to invalid output
Clock high pulse width
-
3.5
-
3.5
OE
0.0
1.5
0.0
-
-
-
0.0
1.5
0.0
-
-
-
2,3,4
2
LZC
OH
-
-
2,3,4
2,3,4
2,3,4
LZOE
HZOE
HZC
OHOE
CH
3.5
3.5
-
3.5
3.5
-
-
-
0.0
2.5
2.5
1.5
1.5
1.5
1.5
0.5
0.5
0.5
1.5
1.5
0.5
1.5
0.5
0.0
2.5
2.5
1.5
1.5
1.5
1.5
0.5
0.5
0.5
1.5
1.5
0.5
1.5
0.5
-
-
5
5
Clock low pulse width
-
-
CL
Address and Control setup to clock high
Data setup to clock high
-
-
6
AS
-
-
6
DS
Write setup to clock high
-
-
6, 7
6, 8
6
WS
Chip select setup to clock high
Address hold from clock high
Data hold from clock high
-
-
CSS
AH
-
-
-
-
6
DH
Write hold from clock high
Chip select hold from clock high
Clock enable setup to clock high
Clock enable hold from clock high
ADV setup to clock high
-
-
6, 7
6, 8
6
WH
-
-
CSH
CENS
CENH
ADVS
ADVH
-
-
-
-
6
-
-
6
ADV hold from clock high
-
-
6
1 See “Notes” on page 11.
7/12/04, v. 1.0
Alliance Semiconductor
P. 8 of 14
ISSI [ INTEGRATED SILICON SOLUTION, INC ]
