欢迎访问ic37.com |
会员登录 免费注册
发布采购

61LV5128 参数 Datasheet PDF下载

61LV5128图片预览
型号: 61LV5128
PDF下载: 下载PDF文件 查看货源
内容描述: 512K ×8高速CMOS静态RAM [512K x 8 HIGH-SPEED CMOS STATIC RAM]
分类和应用:
文件页数/大小: 9 页 / 75 K
品牌: ISSI [ INTEGRATED SILICON SOLUTION, INC ]
 浏览型号61LV5128的Datasheet PDF文件第1页浏览型号61LV5128的Datasheet PDF文件第2页浏览型号61LV5128的Datasheet PDF文件第3页浏览型号61LV5128的Datasheet PDF文件第4页浏览型号61LV5128的Datasheet PDF文件第6页浏览型号61LV5128的Datasheet PDF文件第7页浏览型号61LV5128的Datasheet PDF文件第8页浏览型号61LV5128的Datasheet PDF文件第9页  
®
IS61LV5128  
ISSI  
READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range)  
-10 ns  
Min.  
-12 ns  
Min.  
-15 ns  
Min. Max.  
Symbol  
tRC  
Parameter  
Max.  
10  
10  
4
Max.  
12  
12  
5
Unit  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
Read Cycle Time  
Address Access Time  
Output Hold Time  
CE Access Time  
OE Access Time  
OE to Low-Z Output  
OE to High-Z Output  
CE to Low-Z Output  
CE to High-Z Output  
Power Up Time  
10  
3
12  
3
15  
3
15  
15  
7
tAA  
tOHA  
tACE  
tDOE  
0
0
0
(2)  
tLZOE  
4
5
6
(2)  
tHZOE  
0
0
0
(2)  
tLZCE  
3
4
3
6
3
8
(2)  
tHZCE  
0
0
0
tPU  
tPD  
0
10  
0
12  
0
15  
Power Down Time  
Notes:  
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V and  
outputloadingspecifiedinFigure1.  
2. Tested with the load in Figure 2. Transition is measured 500 mV from steady-state voltage. Not 100% tested.  
AC TEST CONDITIONS  
Parameter  
Input Pulse Level  
Input Rise and Fall Times  
Unit  
0V to 3.0V  
3 ns  
Input and Output Timing  
and Reference Levels  
1.5V  
Output Load  
See Figures 1 and 2  
AC TEST LOADS  
319  
319  
3.3V  
3.3V  
OUTPUT  
OUTPUT  
353 Ω  
353 Ω  
30 pF  
Including  
jig and  
5 pF  
Including  
jig and  
scope  
scope  
Figure 1  
Figure 2  
Integrated Silicon Solution, Inc. 1-800-379-4774  
5
Rev. B  
07/16/01  
 复制成功!