HIP6016
Shutdown
+5V
IN
The PWM output does not switch until the soft-start voltage
+3.3V
IN
+12V
(V ) exceeds the oscillator’s valley voltage. Additionally, the
C
SS
IN
C
C
OCSET
VCC
VCC GND
reference on each linear’s amplifier is clamped to the soft-
start voltage. Holding the SS pin low with an open drain or
collector signal turns off all three regulators.
V
R
OCSET
IN2
OCSET
Q1
Q2
Q3
UGATE
L
V
OUT1
OUT3
GATE3
V
OUT1
The ‘11111’ VID code resulting in an INHIBIT, as shown in
Table 1, also shuts down the IC.
PHASE
HIP6016
C
OUT1
Layout Considerations
LGATE
PGND
CR1
V
OUT2
SS
MOSFETs switch very fast and efficiently. The speed with
which the current transitions from one device to another
causes voltage spikes across the interconnecting impedances
and parasitic circuit elements. The voltage spikes can
degrade efficiency, radiate noise into the circuit, and lead to
device over-voltage stress. Careful component layout and
printed circuit design minimizes the voltage spikes in the
converter. Consider, as an example, the turn-off transition of
the upper PWM MOSFET. Prior to turn-off, the upper
MOSFET was carrying the full load current. During the turn-
off, current stops flowing in the upper MOSFET and is picked
up by the lower MOSFET (and/or parallel Schottky diode).
Any inductance in the switched current path generates a large
voltage spike during the switching interval. Careful component
selection, tight layout of the critical components, and short,
wide circuit traces minimize the magnitude of voltage spikes.
Contact Intersil for evaluation board drawings of the
component placement and printed circuit board.
C
SS
V
OUT2
C
OUT2
KEY
ISLAND ON POWER PLANE LAYER
ISLAND ON CIRCUIT PLANE LAYER
VIA CONNECTION TO GROUND PLANE
FIGURE 10. PRINTED CIRCUIT BOARD POWER PLANES AND
ISLANDS
Use copper filled polygons on the top and bottom circuit
layers for the phase nodes. Use the remaining printed circuit
layers for small signal wiring. The wiring traces from the
control IC to the MOSFET gate and source should be sized
to carry 1A currents. The traces for OUT2 need only be sized
for 0.2A. Locate C
OUT2
close to the HIP6016 IC.
PWM Controller Feedback Compensation
Both PWM controllers use voltage-mode control for output
regulation. This section highlights the design consideration
for a voltage-mode controller. Apply the methods and
considerations to both PWM controllers.
There are two sets of critical components in a DC-DC
converter using a HIP6016 controller. The power
components are the most critical because they switch large
amounts of energy. The critical small signal components
connect to sensitive nodes or supply critical bypassing
current.
Figure 11 highlights the voltage-mode control loop for a
synchronous-rectified buck converter. The output voltage is
regulated to the reference voltage level. The reference
voltage level is the DAC output voltage for the PWM
controller. The error amplifier output (V ) is compared with
the oscillator (OSC) triangular wave to provide a pulse-width
The power components should be placed first. Locate the
input capacitors close to the power switches. Minimize the
length of the connections between the input capacitors and
the power switches. Locate the output inductor and output
capacitors between the MOSFETs and the load. Locate the
PWM controller close to the MOSFETs.
E/A
modulated wave with an amplitude of V at the PHASE
node. The PWM wave is smoothed by the output filter (L
IN
O
and C ).
O
The critical small signal components include the bypass
The modulator transfer function is the small-signal transfer
function of V /V . This function is dominated by a DC
capacitor for VCC and the soft-start capacitor, C . Locate
SS
OUT E/A
gain and the output filter, with a double pole break frequency
at F and a zero at F . The DC gain of the modulator is
these components close to their connecting pins on the
control IC. Minimize any leakage current paths from SS node
because the internal current source is only 11µA.
LC ESR
simply the input voltage, V , divided by the peak-to-peak
IN
A multi-layer printed circuit board is recommended. Figure
10 shows the connections of the critical components in the
oscillator voltage, ∆V
OSC
.
Modulator Break Frequency Equations
converter. Note that capacitors C and C
could each
IN OUT
represent numerous physical capacitors. Dedicate one solid
layer for a ground plane and make all critical component
ground connections with vias to this layer. Dedicate another
solid layer as a power plane and break this plane into
smaller islands of common voltage levels. The power plane
should support the input power and output power nodes.
1
1
= -----------------------------------------
2π × ESR × C
O
F
= ----------------------------------------
F
LC
2π ×
L
× C
ESR
O
O
The compensation network consists of the error amplifier
internal to the HIP6016 and the impedance networks Z
IN
and Z . The goal of the compensation network is to provide
FB
2-205
INTERSIL [ Intersil ]
