£
Intel Advanced+ Boot Block Flash Memory (C3)
8.5
AC I/O Test Conditions
Figure 11. AC Input/Output Reference Waveform
VCCQ
Test Points
Input
V
CCQ/2
VCCQ/2
Output
0V
NOTE: Input timing begins, and output timing ends, at V
/2. Input rise and fall times (10% to 90%) < 5 ns.
CCQ
Worst case speed conditions are when V = V Min.
CC
CC
Figure 12. Transient Equivalent Testing Load Circuit
VCCQ
R1
Device
Under Test
Out
CL
R2
NOTE: See Table 17 for component values.
Table 23. Test Configuration Component Values for Worst Case Speed Conditions
Test Configuration
Min Standard Test
C
(pF)
R
(kΩ)
R (kΩ)
2
L
1
V
50
25
25
CCQ
NOTE: C includes jig capacitance.
L
8.6
Device Capacitance
T = 25 °C, f = 1 MHz
A
Symbol
Parameter§
Typ
Max
Unit
Condition
V = 0.0 V
IN
C
C
Input Capacitance
Output Capacitance
6
8
8
pF
pF
IN
12
V
= 0.0 V
OUT
OUT
§Sampled, not 100% tested.
Datasheet
49
INTEL [ INTEL ]
