256-Mbit J3 (x8/x16)
Table 30. Primary Vendor-Specific Extended Query (Sheet 2 of 2)
Offset(1)
P = 31h
Description
(Optional Flash Features and Commands)
Hex
Code
Length
Add.
Value
Optional feature and command support (1=yes, 0=no)
bits 9–31 are reserved; undefined bits are “0.” If bit 31 is
“1” then another 31 bit field of optional features follows at
the end of the bit-30 field.
36:
37:
38:
39:
--0A
--00
--00
--00
bit 0 Chip erase supported
bit 0 = 0
No
Yes
Yes
Yes(1)
No
(P+5)h
(P+6)h
(P+7)h
(P+8)h
bit 1 Suspend erase supported
bit 1 = 1
bit 2 = 1
bit 3 = 1(1)
bit 4 = 0
bit 5 = 0
bit 6 = 1
bit 7 = 1
bit 8 = 0
4
bit 2 Suspend program supported
bit 3 Legacy lock/unlock supported
bit 4 Queued erase supported
bit 5 Instant Individual block locking supported
bit 6 Protection bits supported
No
Yes
Yes
No
bit 7 Page-mode read supported
bit 8 Synchronous read supported
Supported functions after suspend: read Array, Status,
Query
Other supported operations are:
bits 1–7 reserved; undefined bits are “0”
3A:
--01
(P+9)h
1
2
bit 0 Program supported after erase suspend
Block status register mask
bit 0 = 1
3B:
3C:
bit 0 = 1
bit 1 = 0
Yes
--01
--00
(P+A)h
(P+B)h
bits 2–15 are Reserved; undefined bits are “0”
bit 0 Block Lock-Bit Status register active
bit 1 Block Lock-Down Bit Status active
Yes
No
V
logic supply highest performance program/erase
CC
voltage
bits 0–3 BCD value in 100 mV
bits 4–7 BCD value in volts
optimum program/erase supply voltage
bits 0–3 BCD value in 100 mV
bits 4–7 HEX value in volts
(P+C)h
1
1
3D:
--33
--00
3.3 V
0.0 V
V
PP
(P+D)h
3E:
NOTE:
1. Future devices may not support the described “Legacy Lock/Unlock” function. Thus bit 3 would have a
value of “0.”
Datasheet
57
INTEL [ INTEL ]
