28F640L30, 28F128L30, 28F256L30
2.5
Memory Map
The 64Mb and 128Mb memory array is divided into multiple 8-Mbit partitions. Each device
density contains one parameter partition and several main partitions. The 8-Mbit top or bottom
parameter partition contains four 16K-Word blocks and seven 64K-Word blocks. There are
multiple 8-Mbit main partitions. The 8-Mbit main partitions each contains eight 64K-Word blocks.
The device multi-partition architecture is divided as follow:
• The 64-Mbit device contains eight partitions: one 8-Mbit parameter partition, seven 8-Mbit
main partitions.
• The 128-Mbit device contains sixteen partitions: one 8-Mbit parameter partition, fifteen 8-
Mbit main partitions.
• The 256Mb memory array is divided into multiple 16-Mbit partitions. Each device contains
one parameter partition and fifteen main partitions. The 16-Mbit top or bottom parameter
partition contains four 16K-Word blocks and fifteen 64K-Word blocks. There are fifteen 16-
Mbit main partitions. The 16-Mbit main partitions each contains sixteen 64K-Word blocks.
Table 3 and Table 4 show the top and bottom parameter memory maps.
Table 3. Top Parameter Memory Map
Size (KW) Blk
64-Mbit
Size (KW) Blk
128-Mbit
43
16
16
16
16
64
66 3FC000-3FFFFF
16 130 7FC000-7FFFFF
16 129 7F8000-7FBFFF
16 128 7F4000-7F7FFF
16 127 7F0000-7F3FFF
64 126 7E0000-7EFFFF
65 3F8000-3FBFFF
64 3F4000-3F7FFF
63 3F0000-3F3FFF
62 3E0000-3EFFFF
64
64
56 380000-38FFFF
55 370000-37FFFF
64 120 780000-78FFFF
64 119 770000-77FFFF
64
0
000000-00FFFF
64
0
000000-00FFFF
Size (KW) Blk
256-Mbit
16 258 FFC000-FFFFFF
16 257 FF8000-FFBFFF
16 256 FF4000-FF7FFF
16 255 FF0000-FF3FFF
64 254 FE0000-FEFFFF
64 240 F00000-FFFFFF
64 239 EF0000-EFFFFF
64 128 800000-80FFFF
64 127 7F0000-7FFFFF
64
0
000000-00FFFF
Datasheet
15
INTEL [ INTEL ]
