Low Power Features
Table 2. Coordination of Thread Low-power States at the Package Level
Package State2
Thread State
C0
C11
C2
C4
C0
C11
C2
Normal
Normal
Normal
Normal
AutoHalt
AutoHalt
Normal
AutoHalt
Normal
AutoHalt
Stop-Grant
Stop-Grant
Deeper Sleep
/Intel® Enhanced
Deeper Sleep
C4
Normal
AutoHalt
Stop-Grant
NOTES:
1.
2.
AutoHALT or MWAIT/C1.
To enter a package state, both threads must be in a common low power state. If the
threads are not in a common low power state, the package state will resolve to the
highest power C state.
2.1.1
Thread Low-power State Descriptions
2.1.1.1
Thread C0 State
This is the normal operating state for threads in the processor.
2.1.1.2
Thread C1/AutoHALT Power-down State
C1/AutoHALT is a low-power state entered when a thread executes the HALT
instruction. The processor thread will transition to the C0 state upon occurrence of
SMI#, INIT#, LINT [1:0] (NMI, INTR), or FSB interrupt messages. RESET# will cause
the processor to immediately initialize itself.
A System Management Interrupt (SMI) handler will return execution to either Normal
state or the AutoHALT Power-down state. See the Intel® 64 and IA-32 Architectures
Software Developer's Manuals, Volume 3A/3B: System Programmer's Guide for more
information.
The system can generate a STPCLK# while the processor is in the AutoHALT Power-
down state. When the system de-asserts the STPCLK# interrupt, the processor will
return execution to the HALT state.
While in AutoHALT Power-down state, the processor threads will process bus snoops
and snoops from the other thread. The processor will enter a snoopable sub-state (not
shown in Figure 1) to process the snoop and then return to the AutoHALT Power-down
state.
12
Datasheet
INTEL [ INTEL ]
