Fast Ethernet 10/100 Quad Transceivers — LXT974/LXT975
Figure 1. LXT974/975 Block Diagram
VCCMII
MII_MD<1:0>
CFG<2:0>
CLK25M
VCC
Global Functions
MII Power
Supply
3.3V or 5V
Pwr Supply /
PwrDown
Internal Clocks
Management /
Mode Select
Logic
GND
PWRDN
RESET
ADDR<4:2>
MDIO
MDC
SerLED
LEDENA
3
MDINT
LEDCLK
LEDDAT
Register Set
+
Manchester
Encoder
TX_ENn
10
TP
Driver
TP Out
/
Pulse
Shaper
MII
TPOP/FIBINn
TPON/FIBIPn
TX_ERn
Parallel/Serial
Converter
Scrambler
& Encoder
-
100
TXDn<3:0>
+
Fiber In
ECL
Driver
Auto
Negotiation
-
FDX Status
& LED
Drivers
Tristate Control
LEDn<2:0>
SD/TXn
TRSTEn
3
Media Select &
Line Energy Monitor
TX_CLKn
RX_CLKn
Clock
Generator
+
Fiber Out
TP
TPIP/FIBOPn
TPIN/FIBONn
Rcvr
/
Manchester
Decoder
Serial to
Parallel
Converter
Baseline
RXDn<3:0>
-
MII
10
Slicer
Wander
TP In
Correction
CRSn
COLn
RX_DVn
RX_ERn
Carrier Sense
Collision Detect
Data Valid
Decoder &
Descrambler
100
+
ECL
Rcvr
Error Detect
-
Per-Port Functions
PORT 0
PORT 1
PORT 2
PORT 3
Datasheet
9
INTEL [ INTEL ]
