LXT974/LXT975 — Fast Ethernet 10/100 Quad Transceivers
Tables
1
LXT974 Signal Detect/TP Select Signal Descriptions.........................................11
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
LXT974 Twisted-Pair Interface Signal Descriptions............................................11
LXT974 Fiber Interface Signal Descriptions........................................................11
LXT975 Signal Detect/TP Select Signal Descriptions.........................................13
LXT975 Twisted-Pair Interface Signal Descriptions............................................13
LXT975 Fiber Interface Signal Descriptions........................................................13
LXT974 and LXT975 MII Signal Descriptions .....................................................14
LXT974 and LXT975 Hardware Control Interface Signal Descriptions...............16
LXT974 and LXT975 Miscellaneous Signal Descriptions ...................................17
LXT974 and LXT975 LED Indicator Signal Descriptions ....................................17
LXT974 Power Supply Signal Descriptions.........................................................18
LXT975 Power Supply Signal Descriptions.........................................................18
Test Loopback Operation....................................................................................23
Carrier Sense, Loopback, and Collision Conditions............................................24
Configuring the LXT974/975 via Hardware Control ............................................26
Configuring LXT974/975 Auto-Negotiation Advertisements Via
Hardware Control................................................................................................26
Configuring the LXT974/975 with Auto-Negotiation Disabled.............................27
Mode Control Settings.........................................................................................28
4B/5B Coding......................................................................................................32
LED-DAT Serial Port Bit Assignments ................................................................39
Magnetics Requirements ....................................................................................43
Absolute Maximum Ratings ................................................................................50
Operating Conditions ..........................................................................................50
Digital I/O Characteristics 1.................................................................................50
Digital I/O Characteristics - MII Pins) ..................................................................51
Required CLK25M Characteristics......................................................................51
Low-Voltage Fault Detect Characteristics...........................................................51
100BASE-TX Transceiver Characteristics ..........................................................51
100BASE-FX Transceiver Characteristics ..........................................................52
10BASE-T Transceiver Characteristics...............................................................52
MII - 100BASE-TX Receive Timing Parameters .................................................53
MII - 100BASE-TX Transmit Timing Parameters ................................................54
MII - 100BASE-FX Receive Timing Parameters .................................................55
MII - 100BASE-FX Transmit Timing Parameters ................................................56
MII - 10BASE-T Receive Timing Parameters......................................................57
MII - 10BASE-T Transmit Timing Parameters.....................................................58
10BASE-T SQE (Heartbeat) Timing Parameters................................................58
10BASE-T Jab and Unjab Timing Parameters....................................................59
Auto Negotiation and Fast Link Pulse Timing Parameters..................................60
MII Timing Parameters........................................................................................61
Power Down Timing Parameters ........................................................................62
Serial LED Timing Parameters............................................................................62
Register Set ........................................................................................................63
Control Register ..................................................................................................64
Status Register (Address 1)................................................................................65
PHY Identification Register 1 (Address 2)...........................................................66
PHY Identification Register 2 (Address 3)...........................................................66
Auto Negotiation Advertisement Register (Address 4)........................................67
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
6
Datasheet
INTEL [ INTEL ]
