LXT974/LXT975 — Fast Ethernet 10/100 Quad Transceivers
Figure 38. Power Down Timing
VCC = 4.75V
VCC
RESET
tPDR
MDIO,etc
Table 41. Power Down Timing Parameters
1
Parameter
Sym
Min
Typ
50
Max
Units
Power Down recovery time
tPDR
–
–
ms
1. Typical values are at 25° C and are for design aid only; not guaranteed and not subject to production testing.
Figure 39. Serial LED Timing
tena2
tdat2
tena1
LEDENA
LEDCLK
LEDDAT
tdat1
Table 42. Serial LED Timing Parameters
1
Parameter
Symbol
Min
Typ
Max
Units
LEDENA setup to LEDCLK falling edge
LEDENA hold from LEDCLK falling edge
LEDDAT setup to LEDCLK falling edge
LEDDAT hold from LEDCLK falling edge
tena1
tena2
tdat1
tdat2
5
15
5
12
21
12
21
–
–
–
–
ns
ns
ns
ns
15
1. Typical values are at 25° C and are for design aid only; they are not guaranteed and not subject to production testing.
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Datasheet
INTEL [ INTEL ]
