LXT974/LXT975 — Fast Ethernet 10/100 Quad Transceivers
Figure 34. Auto Negotiation and Fast Link Pulse Timing
Clock Pulse
Data Pulse
Clock Pulse
TPOP
t1
t1
t3
t2
Figure 35. Fast Link Pulse Timing
FLP Burst
FLP Burst
TPOP
t4
t5
Table 39. Auto Negotiation and Fast Link Pulse Timing Parameters
1
Parameter
Sym
Min
Typ
Max
Units
Clock/Data pulse width
Clock pulse to Data pulse
Clock pulse to Clock pulse
FLP burst width
t1
t2
t3
t4
t5
–
–
55.5
111
–
100
62.5
125
2
–
69.5
139
–
ns
µs
µs
ms
ms
ea
FLP burst to FLP burst
Clock/Data pulses per burst
8
12
24
17
–
33
1. Typical values are at 25 °C and are for design aid only; not guaranteed and not subject to production testing.
60
Datasheet
INTEL [ INTEL ]
