LXT974/LXT975 — Fast Ethernet 10/100 Quad Transceivers
2.3.3
Link Configuration
When the LXT974/975 is first powered on, reset, or encounters a link failure state, it must
determine the line speed and operating conditions to use for the network link.
The LXT974/975 first checks the Hardware Control Interface pins and MDIO registers. Using
these mechanisms, the user can command the LXT974/975 to do one of the following:
• Force network link to 100FX (Fiber).
• Force network link operation to:
100TX, Full-Duplex
100TX, Half-Duplex
10BASE-T, Full-Duplex
10BASE-T, Half-Duplex
• Allow auto-negotiation/parallel-detection. The Hardware Control Interface pins are used to set
the state of the MDIO advertisement registers.
When forcing the network link, the LXT974/975 immediately begins operating the network
interface as commanded. When auto-negotiation is enabled, the auto-negotiation / parallel-
detection operation begins.
Table 18. Mode Control Settings
PWR
DWN
Pin 102
MDDIS
Pin 100
RESET
Pin 109
Mode
MDIO Control
Manual Control
Reset
Low
High
High
Low
-
Low
Low
Low
High
High
-
-
Power Down
Figure 11. Hardware Interface Mode Selection
Power-up or Reset
Manual Control
Mode
MDIO Control
Mode
Low
Check Value
MDDIS
High
Read H/W Control
Interface
Disable MDIO Writes
Read H/W Control
Interface
Initialize MDIO Registers
Pass Control to MDIO
Interface
Update MDIO Registers
Exit
28
Datasheet
INTEL [ INTEL ]
