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LXT975AHC 参数 Datasheet PDF下载

LXT975AHC图片预览
型号: LXT975AHC
PDF下载: 下载PDF文件 查看货源
内容描述: 快速以太网10/100四收发器 [Fast Ethernet 10/100 Quad Transceivers]
分类和应用: 网络接口电信集成电路电信电路以太网局域网(LAN)标准以太网:16GBASE-T
文件页数/大小: 74 页 / 1026 K
品牌: INTEL [ INTEL ]
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Fast Ethernet 10/100 Quad Transceivers LXT974/LXT975  
2.0  
Functional Description  
2.1  
Introduction  
The LXT974 and LXT975 are four-port Fast Ethernet 10/100 Transceivers that support 10 Mbps  
and 100 Mbps networks. They comply with all applicable requirements of IEEE 802.3. Each port  
can directly drive either a 100BASE-TX line (>130 meters) or a 10BASE-T line (>185 meters).  
Figure 4 shows the LXT974 in a typical switch application.  
Figure 4. LXT974 Switch Application  
Fiber  
Module  
Backplane  
Fiber  
Module  
LXT974  
10/100  
Quad Transceiver  
Switch  
MAC ASIC  
Memory  
Fiber  
Module  
Fiber  
Module  
LXT974  
10/100  
LXT974  
10/100  
Quad Transceiver  
Quad Transceiver  
QUAD  
QUAD  
Transformer  
Transformer  
Single RJ-45  
Selectable 10 or 100 Mbps  
On power-up, the LXT974/975 uses auto-negotiation/parallel detection on each port to  
automatically determine line operating conditions. If the PHY device on the other side of the link  
supports auto-negotiation, the LXT974/975 auto-negotiates with it using Fast Link Pulse (FLP)  
Bursts. If the PHY partner does not support auto-negotiation, the LXT974/975 automatically  
detects the presence of either link pulses (10 Mbps PHY) or Idle symbols (100 Mbps PHY) and set  
its operating conditions accordingly.  
The LXT974/975 interfaces to four 10/100 Media Access Controllers (MAC)s through the MII  
interfaces. It performs all functions of the Physical Coding Sublayer (PCS) and Physical Media  
Attachment (PMA) sublayer as defined in the IEEE 802.3 100BASE-X specification. This device  
also performs all functions of the Physical Media Dependent (PMD) sublayer for 100BASE-TX  
connections. The MII speeds are automatically set once port operating conditions have been  
determined.  
The LXT974/975 provides half-duplex and full-duplex operation at 100 Mbps and 10 Mbps. It also  
offers standard Loopback Mode for switch applications. The LXT974/975 supports the 802.3  
MDIO register set. Specific bits in the registers are referenced using an X.Ynotation, where X is  
the register number (0-6 or 16-20) and Y is the bit number (0-15).  
The LXT975 is pin compatible with the LXT974 except for the network ports. Each port on the  
LXT974 provides a combination twisted-pair or PECL interface for a 10/100BASE-TX or  
100BASE-FX connection.  
The LXT975 is optimized for stacked RJ-45 modular applications as shown in Figure 5. Ports 1  
and 3 support the PECL interface for fiber connections and all four ports support the twisted-pair  
interface for 10/100BASE-TX connections.  
Datasheet  
19  
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