LXT351 — T1/E1 Short Haul Transceiver with Crystal-less Jitter Attenuation
Table 13. Performance Status Register Read Only, Address (A7-A0) = x010101x
Bit
Name
Function
1 = Driver Failure Monitor Open detected.
5
DFMO
0 = Driver Failure Monitor Open not detected.
1 = Built-In Self Test passed.
6
7
BIST
-
0 = Built-In Self Test did not pass (or was not run).
Reserved. Ignore.
Table 14. Control Register #4 Read/Write, Address (A7-A0) = x010111x
Bit
Name
Function
1 = Enable detection of HDB3 code violations at the BPV pin along with bipolar violations and Zero
Substitution Violations (if enabled).
0
CODEV
0 = Disable detection of HDB3 code violations
1 = Enable detection of HDB3 Zero Substitution Violations (four consecutive zeros). Note that Zero
Substitution Violations are reported at the BPV pin.
1
ZEROV
0 = Disable detection of HDB3 Zero Substitution Violations.
1 = Set LOS detection threshold to 2048 consecutive zeros.
2
3
LOS2048
0 = Set LOS detection threshold to 32 consecutive zeros (for E1 operation) or to 175 consecutive
zeros (for T1 operation).
1 = Set LOS clear condition criterion to receipt of 32 consecutive marks (E1 operation).
0 = Set LOS clear condition criterion to 12.5% mark density (E1 operation).
COL32CM
4
5
6
7
-
-
-
-
Reserved. Set to 0 for normal operation, ignore when reading
Reserved. Set to 0 for normal operation, ignore when reading
Reserved. Set to 0 for normal operation, ignore when reading
Reserved. Set to 0 for normal operation, ignore when reading
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Datasheet
INTEL [ INTEL ]
