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EPM1270GT144C5N 参数 Datasheet PDF下载

EPM1270GT144C5N图片预览
型号: EPM1270GT144C5N
PDF下载: 下载PDF文件 查看货源
内容描述: [Flash PLD, 10ns, 980-Cell, CMOS, PQFP144, 22 X 22 MM, 0.50 MM PITCH, LEAD FREE, TQFP-144]
分类和应用: 输入元件可编程逻辑
文件页数/大小: 88 页 / 982 K
品牌: INTEL [ INTEL CORPORATION ]
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5–8
Chapter 5: DC and Switching Characteristics
Power Consumption
Power-Up Timing
shows the power-up timing characteristics for MAX II devices.
Table 5–12.
MAX II Power-Up Timing
Symbol
t
CONF IG
Parameter
The amount of time from when
minimum V
C CINT
is reached until
the device enters user mode
Device
EPM240
EPM570
EPM1270
EPM2210
Notes to
(1)
values apply to commercial and industrial range devices. For extended temperature range devices, the t
CONF IG
maximum values are
as follows:
Device
Maximum
EPM240
300 µs
EPM570
400 µs
EPM1270
400 µs
EPM2210
500 µs
(2) For more information about POR trigger voltage, refer to the
chapter in the
MAX II Device
Handbook.
Min
Typ
Max
200
300
300
450
Unit
µs
µs
µs
µs
Power Consumption
Designers can use the Altera
®
PowerPlay Early Power Estimator and PowerPlay
Power Analyzer to estimate the device power.
f
For more information about these power analysis tools, refer to the
chapter in the
MAX II Device Handbook
and the
chapter in volume 3 of the
Quartus II Handbook.
Timing Model and Specifications
MAX II devices timing can be analyzed with the Altera Quartus
®
II software, a variety
of popular industry-standard EDA simulators and timing analyzers, or with the
timing model shown in
MAX II devices have predictable internal delays that enable the designer to determine
the worst-case timing of any design. The software provides timing simulation,
point-to-point delay prediction, and detailed timing analysis for device-wide
performance evaluation.