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EPM1270GT144C5N 参数 Datasheet PDF下载

EPM1270GT144C5N图片预览
型号: EPM1270GT144C5N
PDF下载: 下载PDF文件 查看货源
内容描述: [Flash PLD, 10ns, 980-Cell, CMOS, PQFP144, 22 X 22 MM, 0.50 MM PITCH, LEAD FREE, TQFP-144]
分类和应用: 输入元件可编程逻辑
文件页数/大小: 88 页 / 982 K
品牌: INTEL [ INTEL ]
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Chapter 2: MAX II Architecture  
2–33  
Document Revision History  
Document Revision History  
Table 2–8 shows the revision history for this chapter.  
Table 2–8. Document Revision History  
Date and Revision Changes Made  
Summary of Changes  
October 2008,  
version 2.2  
Updated Table 2–4 and Table 2–6.  
Updated “I/O Standards and Banks” section.  
Updated New Document Format.  
March 2008,  
version 2.1  
Updated “Schmitt Trigger” section.  
December 2007,  
version 2.0  
Updated “Clear and Preset Logic Control” section.  
Updated “MultiVolt Core” section.  
Updated “MultiVolt I/O Interface” section.  
Updated Table 2–7.  
Updated document with  
MAX IIZ information.  
Added “Referenced Documents” section.  
December 2006,  
version 1.7  
Minor update in “Internal Oscillator” section. Added document  
revision history.  
August 2006,  
version 1.6  
Updated functional description and I/O structure sections.  
Minor content and table updates.  
July 2006,  
vervion 1.5  
February 2006,  
version 1.4  
Updated “LAB Control Signals” section.  
Updated “Clear and Preset Logic Control” section.  
Updated “Internal Oscillator” section.  
Updated Table 2–5.  
August 2005,  
version 1.3  
Removed Note 2 from Table 2-7.  
December 2004,  
version 1.2  
Added a paragraph to page 2-15.  
June 2004,  
version 1.1  
Added CFM acronym. Corrected Figure 2-19.  
© October 2008 Altera Corporation  
MAX II Device Handbook  
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