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EPM1270GT144C5N 参数 Datasheet PDF下载

EPM1270GT144C5N图片预览
型号: EPM1270GT144C5N
PDF下载: 下载PDF文件 查看货源
内容描述: [Flash PLD, 10ns, 980-Cell, CMOS, PQFP144, 22 X 22 MM, 0.50 MM PITCH, LEAD FREE, TQFP-144]
分类和应用: 输入元件可编程逻辑
文件页数/大小: 88 页 / 982 K
品牌: INTEL [ INTEL ]
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2–32  
Chapter 2: MAX II Architecture  
Referenced Documents  
Connect VCCIOpins to either a 1.5-V, 1.8 V, 2.5-V, or 3.3-V power supply, depending  
on the output requirements. The output levels are compatible with systems of the  
same voltage as the power supply (that is, when VCCIOpins are connected to a 1.5-V  
power supply, the output levels are compatible with 1.5-V systems). When VCCIO  
pins are connected to a 3.3-V power supply, the output high is 3.3 V and is compatible  
with 3.3-V or 5.0-V systems. Table 2–7 summarizes MAX II MultiVolt I/O support.  
Table 2–7. MAX II MultiVolt I/O Support (Note 1)  
Input Signal  
Output Signal  
VCCIO (V)  
1.5  
1.5 V  
1.8 V  
2.5 V  
3.3 V  
5.0 V  
1.5 V  
1.8 V  
2.5 V  
3.3 V  
5.0 V  
v
v
v
v
v
v
v
v
v
v (4)  
v
v
v
v (2)  
v (3)  
v (6)  
v
v (3)  
v (6)  
v
1.8  
v
v (6)  
2.5  
v (5)  
v (7)  
3.3  
Notes to Table 2–7:  
(1) To drive inputs higher than VCCIO but less than 4.0 V including the overshoot, disable the I/O clamp diode. However, to drive 5.0-V inputs to the  
device, enable the I/O clamp diode to prevent VI from rising above 4.0 V.  
(2) When VCCIO = 1.8 V, a MAX II device can drive a 1.5-V device with 1.8-V tolerant inputs.  
(3) When VCCIO = 2.5 V, a MAX II device can drive a 1.5-V or 1.8-V device with 2.5-V tolerant inputs.  
(4) When VCCIO = 3.3 V and a 2.5-V input signal feeds an input pin, the VCCIO supply current will be slightly larger than expected.  
(5) MAX II devices can be 5.0-V tolerant with the use of an external resistor and the internal I/O clamp diode on the EPM1270 and EPM2210  
devices.  
(6) When VCCIO = 3.3 V, a MAX II device can drive a 1.5-V, 1.8-V, or 2.5-V device with 3.3-V tolerant inputs.  
(7) When VCCIO = 3.3 V, a MAX II device can drive a device with 5.0-V TTL inputs but not 5.0-V CMOS inputs. In the case of 5.0-V CMOS, open-  
drain setting with internal I/O clamp diode (available only on EPM1270 and EPM2210 devices) and external resistor is required.  
f
For information about output pin source and sink current guidelines, refer to the AN  
428: MAX II CPLD Design Guidelines.  
Referenced Documents  
This chapter referenced the following documents:  
AN 428: MAX II CPLD Design Guidelines  
DC and Switching Characteristics chapter in the MAX II Device Handbook  
Hot Socketing and Power-On Reset in MAX II Devices chapter in the MAX II Device  
Handbook  
Using User Flash Memory in MAX II Devices chapter in the MAX II Device Handbook  
MAX II Device Handbook  
© October 2008 Altera Corporation  
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