2–22
Chapter 2: MAX II Architecture
MultiVolt Core
Figure 2–17. EPM570, EPM1270, and EPM2210 UFM Block LAB Row Interface
CFM Block
RTP_BUSY
BUSY
OSC
DRDout
DRDin
LAB
DRDCLK
DRDSHFT
ARDin
PROGRAM
ERASE
OSC_ENA
ARCLK
ARSHFT
LAB
UFM Block
LAB
MultiVolt Core
The MAX II architecture supports the MultiVolt core feature, which allows MAX II
devices to support multiple VCC levels on the VCCINT supply. An internal linear voltage
regulator provides the necessary 1.8-V internal voltage supply to the device. The
voltage regulator supports 3.3-V or 2.5-V supplies on its inputs to supply the 1.8-V
internal voltage to the device, as shown in Figure 2–18. The voltage regulator is not
guaranteed for voltages that are between the maximum recommended 2.5-V
operating voltage and the minimum recommended 3.3-V operating voltage.
The MAX IIG and MAX IIZ devices use external 1.8-V supply. The 1.8-V VCC external
supply powers the device core directly.
Figure 2–18. MultiVolt Core Feature in MAX II Devices
Voltage
Regulator
1.8-V Core
Voltage
3.3-V or 2.5-V on
VCCINT Pins
1.8-V on
VCCINT Pins
1.8-V Core
Voltage
MAX II Device
MAX IIG or MAX IIZ Device
MAX II Device Handbook
© October 2008 Altera Corporation
INTEL [ INTEL ]
