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EPM1270GT144C5N 参数 Datasheet PDF下载

EPM1270GT144C5N图片预览
型号: EPM1270GT144C5N
PDF下载: 下载PDF文件 查看货源
内容描述: [Flash PLD, 10ns, 980-Cell, CMOS, PQFP144, 22 X 22 MM, 0.50 MM PITCH, LEAD FREE, TQFP-144]
分类和应用: 输入元件可编程逻辑
文件页数/大小: 88 页 / 982 K
品牌: INTEL [ INTEL ]
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Chapter 2: MAX II Architecture  
2–19  
User Flash Memory Block  
Auto-increment addressing  
Serial interface to logic array with programmable interface  
Figure 2–15. UFM Block and Interface Signals  
UFM Block  
PROGRAM  
ERASE  
RTP_BUSY  
BUSY  
Program  
Erase  
Control  
_
:
OSC  
4
OSC_ENA  
OSC  
UFM Sector 1  
UFM Sector 0  
9
ARCLK  
Address  
Register  
16  
16  
ARSHFT  
ARDin  
DRDin  
Data Register  
DRDout  
DRCLK  
DRSHFT  
UFM Storage  
Each device stores up to 8,192 bits of data in the UFM block. Table 2–3 shows the data  
size, sector, and address sizes for the UFM block.  
Table 2–3. UFM Array Size  
Device  
EPM240  
EPM570  
EPM1270  
EPM2210  
Total Bits  
Sectors  
Address Bits  
Data Width  
8,192  
2
9
16  
(4,096 bits/sector)  
There are 512 locations with 9-bit addressing ranging from 000hto 1FFh. Sector 0  
address space is 000hto 0FFhand Sector 1 address space is from 100hto 1FFh. The  
data width is up to 16 bits of data. The Quartus II software automatically creates logic  
to accommodate smaller read or program data widths. Erasure of the UFM involves  
individual sector erasing (that is, one erase of sector 0 and one erase of sector 1 is  
required to erase the entire UFM block). Since sector erase is required before a  
program or write, having two sectors enables a sector size of data to be left untouched  
while the other sector is erased and programmed with new data.  
© October 2008 Altera Corporation  
MAX II Device Handbook  
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