Host-PCI Express* Bridge Registers (D1:F0)
(Intel® 82915G/82915P/82915PL Only)
R
8.1.45
VCECH—Virtual Channel Enhanced Capability Header
(D1:F0)
PCI Device:
Address Offset:
Default Value:
Access:
1
100h
14010002h
RO
Size:
32 bits
This register indicates PCI Express device Virtual Channel capabilities.
Note: Extended capability structures for PCI Express devices are located in PCI Express extended
configuration space and have different field definitions than standard PCI capability structures.
Bit
Access &
Default
Description
31:20
19:16
15:0
RO
140h
Pointer to Next Capability: The Link Declaration Capability is the next in the PCI
Express* extended capabilities list.
RO
1h
PCI Express Virtual Channel Capability Version: Hardwired to 1 to indicate
compliances with the 1.0a version of the PCI Express specification.
RO
Extended Capability ID: Value of 0002 h identifies this linked list item (capability
0002h
structure) as being for PCI Express Virtual Channel registers.
8.1.46
PVCCAP1—Port VC Capability Register 1 (D1:F0)
PCI Device:
Address Offset:
Default Value:
Access:
1
104h
00000001h
RO, R/WO
32 bits
Size:
This register describes the configuration of PCI Express Virtual Channels associated with this
port.
Bit
Access &
Default
Description
31:7
6:4
Reserved
RO
000b
Low Priority Extended VC Count: This field indicates the number of (extended)
Virtual Channels in addition to the default VC belonging to the low-priority VC
(LPVC) group that has the lowest priority with respect to other VC resources in a
strict-priority VC Arbitration.
The value of 0 in this field implies strict VC arbitration.
Reserved
3
2:0
R/WO
001b
Extended VC Count: This field indicates the number of (extended) Virtual
Channels in addition to the default VC supported by the device.
Datasheet
163
INTEL [ INTEL ]
