Host-PCI Express* Bridge Registers (D1:F0)
(Intel® 82915G/82915P/82915PL Only)
R
8.1.40
SLOTCTL—Slot Control (D1:F0)
PCI Device:
Address Offset:
Default Value:
Access:
1
B8h
01C0h
R/W
16 bits
Size:
PCI Express slot related registers allow for the support of Hot-Plug.
Bit
Access &
Default
Description
15:10
9:8
Reserved
R/W
01b
Power Indicator Control: Reads to this register return the current state of the
Power Indicator.
Writes to this register set the Power Indicator and cause the Port to send the
appropriate POWER_INDICATOR_* messages.
00 = Reserved
01 = On
10 = Blink
11 = Off
7:6
R/W
11b
Attention Indicator Control: Reads to this register return the current state of
the Attention Indicator.
Writes to this register set the Attention Indicator and cause the Port to send the
appropriate ATTENTION_INDICATOR_* messages.
00 = Reserved
01 = On
10 = Blink
11 = Off
5
4
R/W
0b
Hot plug Interrupt Enable:
0 = Disable.
1 = Enables generation of hot plug interrupt on enabled hot plug events.
R/W
0b
Command Completed Interrupt Enable:
0 = Disable.
1 = Enables the generation of hot plug interrupt when the Hot plug controller
completes a command.
3
R/W
0b
Presence Detect Changed Enable:
0 = Disable.
1 = Enables the generation of hot plug interrupt or wake message on a
presence detect changed event.
2:1
0
Reserved
R/W
0b
Attention Button Pressed Enable:
0 = Disable.
1 = Enables the generation of hot plug interrupt or wake message on an
attention button pressed event.
158
Datasheet
INTEL [ INTEL ]
