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82915GV 参数 Datasheet PDF下载

82915GV图片预览
型号: 82915GV
PDF下载: 下载PDF文件 查看货源
内容描述: Express芯片组 [Express Chipset]
分类和应用:
文件页数/大小: 426 页 / 3241 K
品牌: INTEL [ INTEL ]
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DMIBAR Registers—Direct Media Interface (DMI) RCRB  
R
7.1.9  
DMIVC1RCTL1—DMI VC1 Resource Control  
MMIO Range:  
Address Offset:  
Default Value:  
Access:  
DMIBAR  
020h  
00100000h  
R/W, RO  
32 bits  
Size:  
This register controls the resources associated with Virtual Channel 1.  
Bit  
Access &  
Default  
Description  
Virtual Channel Enable (EN):  
0 = Disable.  
31  
R/W  
0b  
1 = Enable.  
30:27  
26:24  
RO  
0h  
Reserved  
R/W  
Virtual Channel Identifier (ID): This field indicates the ID to use for this virtual  
001b  
channel.  
23:20  
19:17  
Reserved  
R/W  
0h  
Port Arbitration Select (PAS): This field indicates which port table is being  
programmed. The only permissible value of this field is 4h for the time-based  
WRR entries.  
16:8  
7:1  
Reserved  
R/W  
00h  
Transaction Class / Virtual Channel Map (TVM): This field indicates which  
transaction classes are mapped to this virtual channel. When a bit is set, this  
transaction class is mapped to the virtual channel.  
0
Reserved  
7.1.10  
DMIVC1RSTS—DMI VC1 Resource Status  
MMIO Range:  
Address Offset:  
Default Value:  
Access:  
DMIBAR  
026h  
0000h  
RO  
Size:  
16 bits  
This register reports the Virtual Channel specific status.  
Bit  
Access &  
Default  
Description  
15:2  
1
Reserved  
RO  
0b  
VC Negotiation Pending (NP):  
0 = Virtual channel is Not being negotiated with ingress ports.  
1 = Virtual channel is still being negotiated with ingress ports.  
Reserved  
0
Datasheet  
121  
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