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82915GV 参数 Datasheet PDF下载

82915GV图片预览
型号: 82915GV
PDF下载: 下载PDF文件 查看货源
内容描述: Express芯片组 [Express Chipset]
分类和应用:
文件页数/大小: 426 页 / 3241 K
品牌: INTEL [ INTEL ]
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DMIBAR Registers—Direct Media Interface (DMI) RCRB  
R
7.1.7  
DMIVC0RSTS—DMI VC0 Resource Status  
MMIO Range:  
Address Offset:  
Default Value:  
Access:  
DMIBAR  
01Ah  
00000002h  
RO  
Size:  
16 bits  
This register reports the Virtual Channel specific status.  
Bit  
Access &  
Default  
Description  
15:2  
1
Reserved  
RO  
1b  
VC Negotiation Pending (NP):  
0 = Virtual channel is Not being negotiated with ingress ports.  
1 = Virtual channel is still being negotiated with ingress ports.  
0
RO  
0b  
Port Arbitration Tables Status (ATS): There is no port arbitration table for this  
VC, so this bit is reserved at 0.  
7.1.8  
DMIVC1RCAP—DMI VC1 Resource Capability  
MMIO Range:  
Address Offset:  
Default Value:  
Access:  
DMIBAR  
01Ch  
00008001h  
RO  
Size:  
32 bits  
Bit  
Access &  
Default  
Description  
31:24  
RO  
00h  
Port Arbitration Table Offset (AT): This field indicates the location of the port  
arbitration table in the root complex. A value of 3h indicates the table is at offset  
30h.  
23  
Reserved  
22:16  
RO  
Maximum Time Slots (MTS): This value is updated by platform BIOS based upon  
00h  
the determination of the number of time slots available in the platform.  
15  
14  
RO  
1b  
Reject Snoop Transactions (RTS): All snoopable transactions on VC1 are  
rejected. This VC is for isochronous transfers only.  
RO  
0b  
Advanced Packet Switching (APS): This VC is capable of all transactions, not  
just advanced packet switching transactions.  
13:8  
7:0  
Reserved  
RO  
Port Arbitration Capability (PAC): This field indicates the port arbitration  
01h  
capability is time-based WRR of 128 phases.  
120  
Datasheet  
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