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82915GV 参数 Datasheet PDF下载

82915GV图片预览
型号: 82915GV
PDF下载: 下载PDF文件 查看货源
内容描述: Express芯片组 [Express Chipset]
分类和应用:
文件页数/大小: 426 页 / 3241 K
品牌: INTEL [ INTEL ]
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EPBAR Registers—Egress Port Register Summary  
R
6.1.1  
EPESD—EP Element Self Description  
MMIO Range:  
Address Offset:  
Default Value:  
Access:  
EPBAR  
044h  
00000201h  
R/WO, RO  
32 bits  
Size:  
This register provides information about the root complex element containing this Link  
Declaration capability.  
Bit  
Access  
& Default  
Description  
31:24  
RO  
00h  
Port Number: This field specifies the port number associated with this element with  
respect to the component that contains this element. A value of 00h indicates to  
configuration software that this is the default egress port.  
23:16  
15:8  
R/WO  
00h  
Component ID: This field identifies the physical component that contains this Root  
Complex Element. Component IDs start at 1.  
This value is a mirror of the value in the Component ID field of all elements in this  
component. The value only needs to be written in one of the mirrored fields and it  
will be reflected everywhere that it is mirrored.  
RO  
02h  
Number of Link Entries: This field indicates the number of link entries following  
the Element Self Description. This field reports 2 (one each for PCI Express* x16  
interface and DMI).  
7:4  
3:0  
Reserved  
RO  
1h  
Element Type: This field Indicates the type of the Root Complex Element.  
1h = Port to system memory  
110  
Datasheet  
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