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82551IT 参数 Datasheet PDF下载

82551IT图片预览
型号: 82551IT
PDF下载: 下载PDF文件 查看货源
内容描述: 快速以太网PCI控制器 [Fast Ethernet PCI Controller]
分类和应用: 控制器PC以太网
文件页数/大小: 102 页 / 732 K
品牌: INTEL [ INTEL ]
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82551IT — Networking Silicon  
Figure 11. Auto-Negotiation and Parallel Detect  
Force_Fail  
Ability detect either by  
parallel detect or auto-  
negotiation.  
Parallel Detection  
Auto-Negotiation  
10Base-T or  
100Base-TX Link  
Ready  
FLP capable  
Look at Link Pulse;  
Auto-Negotiation capable = 0  
Auto-Negotiation capable = 1  
Ability Match  
LINK PASS  
Auto-Negotiation Complete bit set  
6.4  
LED Description  
The PHY unit supports three LED pins to indicate link status, network activity and network speed.  
Each pin can source 10 mA.  
Link: This LED is off until a valid link has been detected. After a valid link has been detected,  
the LED will remain on (active-low).  
Activity: This LED blinks on and off when activity is detected on the wire.  
Speed: This LED will be on if a 100BASE-TX link is detected and off if a 10BASE-T link is  
detected. If the link fails while in Auto-Negotiation, this LED will keep the last valid link  
state. If 100BASE-TX link is forced this LED will be on, regardless of the link status. This  
LED will be off if the 10BASE-T link is forced, regardless of the link status.  
MDI register 27 in Section 9.3.12, “Register 27: PHY Unit Special Control Register” details the  
information for LED function mapping and support enhancements.  
Figure 12 provides possible schematic diagrams for configurations using two and three LEDs.  
38  
Datasheet  
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