Front Side Bus Signal Quality Specifications
Table 3-2. Ringback Specifications for PWRGOOD and TAP Signal Groups
Maximum Ringback
Transition (with Input Diodes Present)
Notes
Signal Group
Unit
Figure
PWRGOOD and TAP Low → High
PWRGOOD and TAP High → Low
Vt+(max) to Vt-(max)
Vt-(min) to Vt+(min)
V
V
3-3
3-4
1,2,3,4
1,2,3,4
NOTES:
1. All signal integrity specifications are measured at the processor core (pads).
2. Unless otherwise noted, all specifications in this table apply to all processor frequencies.
3. All values specified by design characterization.
4. Please see Section 3.1.3 for maximum allowable overshoot.
Figure 3-3. Low-to-High Receiver Ringback Tolerance for PWRGOOD and TAP Signals
VTT
Threshold Region to switch
receiver to a logic 1.
Vt+ (max)
Vt+ (min)
0.5 * VTT
Vt- (max)
Allowable Ringback
Vss
64-bit Intel® Xeon™ Processor MP with up to 8MB L3 Cache Datasheet
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