Front Side Bus Signal Quality Specifications
Table 3-3. Source Synchronous (667MHz) AGTL+ Signals Over/Undershoot Tolerance
Absolute Maximum
Overshoot (V)
Absolute Maximum
Undershoot (V)
Pulse Duration (ns)
AF = 1
Pulse Duration (ns)
AF = 0.1
1.55
1.50
1.45
1.40
1.35
1.30
-0.35
-0.30
-0.25
-0.20
-0.15
-0.10
0
0.2
0.7
1.5
1.5
1.5
1.5
0
0.1
0.5
1.3
1.5
NOTES:
1. These specifications are measured at the processor pad.
2. Assumes a BCLK period of 6 ns.
3. AF is referenced to associated source synchronous strobes
Table 3-4. Source Synchronous (333 MHz) AGTL+ Signals Over/Undershoot Tolerance
Absolute Maximum
Overshoot (V)
Absolute Maximum
Undershoot (V)
Pulse Duration (ns)
AF = 1
Pulse Duration (ns)
AF = 0.1
1.55
1.50
1.45
1.40
1.35
1.30
-0.35
-0.30
-0.25
-0.20
-0.15
-0.10
0
0.6
1.9
3.0
3.0
3.0
3.0
0.1
0.5
1.3
3.0
3.0
NOTES:
1. These specifications are measured at the processor pad.
2. BCLK period is 6 ns.
3. AF is referenced to associated source synchronous strobe.
Table 3-5. Common Clock (166 MHz) AGTL+ Signals Overshoot/Undershoot Tolerance
Absolute Maximum
Overshoot (V)
Absolute Maximum
Undershoot (V)
Pulse Duration (ns)
AF = 1
Pulse Duration (ns)
AF = 0.1
1.55
1.50
1.45
1.40
1.35
1.30
-0.35
-0.30
-0.25
-0.20
-0.15
-0.10
0.1
0.3
0.8
2.3
6.0
6.0
1.1
3.2
6.0
6.0
6.0
6.0
NOTES:
1. These specifications are measured at the processor pad.
2. BCLK period is 6 ns.
3. AF is referenced to BCLK[1:0]
64-bit Intel® Xeon™ Processor MP with up to 8MB L3 Cache Datasheet
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