Electrical Specifications
Figure 2-21. VID Step Timings
n
n-1
m
m+1
VID
...
Tc
VCC(max)
Ta
Tb
Td
VCC(min)
Ta = T84: VID Down to Valid VCC(max)
Tb = T82: VID Down to Valid VCC(min)
Tc = T85: VID Up to Valid VCC(max)
Td = T83: VID Up to Valid VCC(min)
Figure 2-22. VID Step Times and V Waveforms
CC
Ta
Tb
n
n-6 = VIDTM2
n
VID
VCC(max)
VCC(max,n-3)
Te
Tc
Td
VCC(max,n-4)
VCC(min)
VCC(min,n-3)
Tf
VCC(min,n-4)
Ta = T80: VID Step Time
Tb = T81: Thermal Monitor 2 Dwell Time
Note: This waveform illustrates an example of an Intel Thermal
Monitor 2 transition or an Intel Enhanced SpeedStep transition
that is six VID steps down from the current state andsix steps
back up. Any arbitrary up or down transition can be generalized
from this waveform.
Tc
= T84: VID Down to Valid VCC(max)
Td = T82: VID Down to Valid VCC(min)
Te = T85: VID Up to Valid VCC(max)
Tf
= T83: VID Up to Valid VCC(min)
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64-bit Intel® Xeon™ Processor MP with up to 8MB L3 Cache Datasheet
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INTEL [ INTEL ]
