Pentium® III Processor for the PGA370 Socket at 500 MHz to 866 MHz
Figure 12. Test Timings (TAP Connection)
TCK
Tv
Tr
Tw
TDI, TMS
Ts
Input
Signal
Tx
Ty
Tu
Tz
T D O
Output
Signal
Tr = T43 (All Non-Test Inputs Setup Time)
Ts = T44 (All Non-Test Inputs Hold Time)
Tu = T40 (TDO Float Delay)
Tv = T37 (TDI, TMS Setup Time)
Tw = T38 (TDI, TMS Hold TIme)
Tx = T39 (TDO Valid Delay)
Ty = T41 (All Non-Test Outputs Valid Delay)
Tz = T42 (All Non-Test Outputs Float Time)
Figure 13. Test Reset Timings
TRST#
1.25V
Tq
Tq = T36 (TRST# Pulse Width)
Datasheet
33