3.8.1.11 Offset 0Fh: BIST—Built-in Self-Test Register (D0: F1, F3).................142
3.8.1.12 Offset 10h: MBAR—Memory Base Register (D0: F1, F3)...................142
3.8.1.13 Offset 2Ch: SS—Subsystem Identifier Register (D0: F1, F3) .............143
3.8.1.14 Offset 34h: CAPP—Capabilities Pointer Register (D0: F1, F3) ..........143
3.8.1.15 Offset 40h: ABAR—Alternate Base Address Register
(D0: F1, F3).........................................................................................143
3.8.1.16 Offset 44h: EXP_CAPID—PCI Express* Capability Identifier
Register (D0: F1, F3) ..........................................................................144
3.8.1.17 Offset 45h: EXP_NXTP—PCI Express* Next Pointer
Register (D0: F1, F3) ..........................................................................144
3.8.1.18 Offset 46: EXP_CAP—PCI Express* Capability
Register (D0: F1, F3) ..........................................................................144
3.8.1.19 Offset 48h: EXP_DCAP—PCI Express* Device Capability
Register (D0: F1, F3) ..........................................................................145
3.8.1.20 Offset 4Ch: DEVCNTL—Device Control Register
(D0: F1, F3).........................................................................................146
3.8.1.21 Offset 4Eh: DSTS—Device Status Register (D0: F1, F3)...................147
3.8.1.22 Offset 50h: LCAP—Link Capabilities Register (D0:F1, F3).................148
3.8.1.23 Offset 54h: LCTL—Link Control Register (D0:F1, F3) ........................149
3.8.1.24 Offset 56h LSTS—Link Status Register (D0:F1, F3) ..........................150
3.8.1.25 Offset 6Ch: PM_CAPID – Power Management Capability
Identifier Register (D0:F1, F3).............................................................150
3.8.1.26 Offset 6Dh: PM_NXTPTR – Power Management Next Pointer ..........150
3.8.1.27 Offset 6Eh: PM_CAP – Power Management Capabilities
Register (D0: F1, F3) ..........................................................................151
3.8.1.28 Offset 70h: PM_CNTLSTS – Power Management Control
and Status Register (D0: F1, F3) ........................................................151
I/OxAPIC Direct Memory Space Registers........................................................151
3.8.2.1 Register Summary ..............................................................................151
3.8.2.2 Offset 00h: IDX—Index Register.........................................................152
3.8.2.3 Offset 10h: WND—Window Register ..................................................152
3.8.2.4 Offset 20h: PAR—IRQ Pin Assertion Register....................................152
3.8.2.5 Offset 40h: EOI—End of Interrupt (EOI) Register...............................153
Indirect Memory Space Registers .....................................................................153
3.8.3.1 Register Summary ..............................................................................153
3.8.3.2 Offset 00h: ID—APIC ID Register.......................................................154
3.8.3.3 Offset 01h: VS—Version Register.......................................................154
3.8.3.4 Offset 02h: ARBID—Arbitration ID Register........................................154
3.8.3.5 Offset 03h: BCFG—Boot Configuration Register................................155
3.8.3.6 Offset 10h, 12h,…, 3Eh: RDL—Redirection Table Low
3.8.2
3.8.3
DWord Register...................................................................................155
3.8.3.7 Offset 11h, 13h,…, 3Fh: RDH—Redirection Table High Register ......156
4
5
Component Ballout.........................................................................................................157
4.1 Intel® 6700PXH 64-bit PCI Hub Ballout...........................................................................157
Signal Lists.....................................................................................................................159
5.1
5.2
Intel® 6700PXH 64-bit PCI Hub Signal List (Sorted by Signal Name).............................159
Intel® 6700PXH 64-bit PCI Hub Signal List (Sorted by Pin Number) ..............................174
6
Mechanical Specifications..............................................................................................191
302628-002
9
INTEL [ INTEL ]
