DDR MemBIST
Table 11-11.Refresh Programming
spec (uS)
clk period (uS)
count
tREFI (15 bits)
min
spec
max
0
0.0025
1
7.8
0.0025
0.0025
3120
32768
81.9
11.3.8
DRAM Initialization
As in other operating modes, MemBIST requires the DRAM be initialized prior to the
start of any operation. DRAM initialization is accomplished by starting the initialization
engine (using the DCALCSR register). This may be done in band or out of band.
11.4
MemBIST Memory Test Examples
In general, using MemBIST will involve the following five steps:
1. Define DRAM characteristics. Set up AMB registers for normal DRAM operation.
This includes programming the MTR register to match the geometry of the DRAMs
on the DIMM. In addition, program the DRT register to match the DDR2 timing of
the DRAMs installed on the DIMM. MemBIST uses settings from MTR and DRT to
match its operation to the characteristics of the DRAMs being tested. Change the
default refresh interval if it does not meet the test objectives. Perform any other
normal initialization.
2. Define the test address space. Define the starting and ending physical Row/
Column/Bank address range which MemBIST is to test in registers MBADDR,
MB_START_ADDR, and MB_END_ADDR as required. Which of these registers is
used depends upon which address range is selected in MBCSR:atype and whether
or not an algorithm is selected.
3. Enter required user test data. Define any required user test data for this test,
using registers MBDATA[9:0] and MBLFSRSED as appropriate. Which of these
registers is used depends upon the setting of MBCSR:dtype, MBCSR:algo, and
MBCSR:enable288.
4. Set test parameters and start MemBIST. Write MBCSR with MBCSR:start set
and other bits set as required to select the desired MemBIST operation.
5. Evaluate the result. The test result is available through MBCSR:pf. Depending
upon which settings were specified in MBCSR, error information is contained in the
MBDATA[9:0]and MB_ERRDATA[4:0] registers.
The next sections provide specific examples of MemBIST execution for selected test
cases.
11.4.1
Write a Fixed Pattern to a Range of DRAM Addresses
The following points describe the programming required to write a fixed data pattern to
all of the addresses within a selected address range, and to optionally check this data,
using MemBIST.
1. Set up registers for normal DRAM operation.
2. Program MB_START_ADDR and MB_END_ADDR registers to the desired address
range to be tested.
132
Intel® 6400/6402 Advanced Memory Buffer Datasheet
INTEL [ INTEL ]
