DDR MemBIST
Failure addresses are logged in a slightly different format than the format which is used
when specifying start and end addresses. To compress the failure address into 32 bits,
bits that are always zero are not stored in the log. These unstored bits include
AutoPrecharge Column address [10] and the least significant bits assumed by burst
length. In BL=4 operation, column bit 1 in the log is replaced by a bit which
distinguishes whether the error was detected in the first 144-bit data chunk (the bit is
0) or in the second chunk (the bit is 1). In like manner, for BL=8 operation, column
bits 2:1 are replaced by two bits to identify the data chunk containing the error. The
bits used for BL=8 are shaded in Table 11-8 below. See Section 14.5.2.3.1, “MBDATA
Failure Address Mapping” for more information.
Table 11-8. Address Log to Bank, Row and Column Bit Correspondence
Address Log Register Bit
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
9
7
8
6
7
5
6
4
5
3
4
2
3
1
2
0
1
2
1
0
15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
14 13 12 11
Bank
Row
Column
11.3.5.3
Failure Data Bit Location Accumulator
MemBIST provides a (sometimes optional) 144-bit failure data bit location accumulator,
maintained in the MBDATA registers. Each bit tracks a data bit during MemBIST
operation. This accumulator is automatically zeroed each time that MemBIST starts
execution of a new operation.
An accumulator bit set to 1 indicates that the corresponding data bit failed to have the
expected value at least once during the operation. This accumulator is used primarily
for recording detected failed data lines to facilitate DRAM replacement during DIMM
manufacturing.
Table 11-9 below shows the correspondence between the DRAM data bus bits and the
160 bits in the MBDATA registers used to store the failure data bit location accumulator.
Table 11-9. Failure Data Bit Location Accumulator to MBDATA Bit Correspondence
MBDATA[8]
MBDATA[3]
MBDATA[2]
MBDATA[1]
MBDATA[0]
31
24
23
16
15
71
8
7
0
31
63
0
31
31
0
31
63
0
31
31
0
Unused
64
71
64
32
0
32
0
Late data
Early data
Late data
Late data
Early data
Early data
11.3.5.4
Failure Data Logging
Failure data is logged in the MB_ERR_DATA registers. These data logging registers are
not cleared when MemBIST starts execution of a new operation, although the
corresponding address logs in the MBDATA registers are cleared. The user desiring to
discard failure data logs from a previous operation must write zeros to these registers
before starting the next operation. During execution of a subsequent operation, when
the first failure is detected, both an address and a data log are written, beginning with
the first error log entry. Any existing data in the data logging registers used for this log
entry is overwritten. The data in the other data logging registers is not affected.
Table 11-10 shows the correspondence between the failure number, the address log for
this error, and the data log for this error. Which register is used to log the address of
the failure depends upon settings in MBCSR:dtype and MBCSR:algo. If MBCSR:algo is
non-zero, then an algorithm is selected, and fixed data is used. Address logging will
occur according to the “Fixed data pattern” entries in Table 11-10.
Intel® 6400/6402 Advanced Memory Buffer Datasheet
129
INTEL [ INTEL ]
