DDR MemBIST
2. This example illustrates the use of MBCSR:atype = 11, so MB_START_ADDR and
MB_END_ADDR are not programmed. However, these registers could alternatively
be set to 0 and the maximum address in the DIMM respectively, and MBCRS:atype
set to 10, to accomplish the same effect.
3. To get a field of 1s for the leaping 0 to traverse, data to the DRAMs must be
inverted. This is because MBDATA[9, 7:4] are set to zeros at the start of MemBIST
execution. That also means that the data programmed into MBLFSRSED must be
inverted. So MBLFSRSED is set to 0x0000_0001. When inverted, this will give a
single 0 in a field of 1s. Registers MBDATA[8, 3:0] are unused and are therefore
not written.
4. Program MBCSR.
These fields are required for the specified test:
— Program DTYPE (bits [9:8]) to 10 to select circular shifted data.
— Program CMD (bits [5:4]) to be 11 (write followed by read with data
comparison).
— Program ATYPE (bits [7:6]) to 11 to use the full address range of the DIMMs as
already defined in the MTR register.
— Select either Rank 0 or Rank 1 by programming CS (bits [21:20]).
— INVERT (bit 19) must be set to 1 to create the field of 1s from the 0s in
MBDATA[9, 7:4].
— ENABLE288 (bit 15) is not relevant when circular shifted data has been
selected. Rewrite this field with its default value of 0.
The values for these fields can be selected to choose options for use during
MemBIST operation:
— Program ABAR (bit 13) to select DAI if desired.
— Program FAST (bits [11:10]) to select Fast X, Fast Y, Fast XY, or XZY (column-
>bank->row) address sequencing.
— Program ADIR (bit 12) to select whether addresses should increment or
decrement.
— MBDATA (bit 14) is set to select failure address logging or failure data bit
location accumulator logging in MBDATA.
Set these control values to start the MemBIST engine.
— Set ALGO (bits 26:24) to 0 to prevent the algorithm engine from overwriting
bits it controls in MBCSR.
— Set ABORT (bit 28) to 0.
— Clear PF (bit 30). Hardware will set this bit if a failure is detected.
— If desired to halt whenever there is an error, set HALT (bit 29).
— Set START (bit 31) to 1 to start MemBIST execution.
5. Check the MemBIST results, and if a failure occurred, observe failure data or
address through MBDATA registers and MB_ERR_DATA registers:
— Check MBCSR:start. 0 means MemBIST has completed. Check MBCSR:PF. 1
means a failure has occurred.
— Depending upon the value chosen for MBCSR:mbdata, either up to 5 failure
addresses or the failure data bit location accumulator will be stored in
MBDATA[8, 3:0].
— Failure data will be stored in the MB_ERR_DATA[3:0][4:0] registers.
Intel® 6400/6402 Advanced Memory Buffer Datasheet
135
INTEL [ INTEL CORPORATION ]
