DDR MemBIST
Table 11-3. Memory Address Definition, BL=8
Address register bit
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
15 14 13 12 11 10 15 14 13 12 11
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
0
0
9
8
7
6
5
4
3
2
1
0
R
Row
Column
Bank
Note:
Address register bit 15 “R” = Reserved for future use
11.3.2.2
Address Generation
The address generation logic and controlling register bits allow a variety of methods to
traverse the address space of the DRAM. These are described in the next sections.
In these explanations, the symbol X refers to the row address. Row address lines are
also called word lines. The symbol Y refers to the column address. Column address
lines are also called bit lines. The symbol Z refers to the bank address. The MemBIST
start address consists of a triple of row, bank, and column address (Xstart, Zstart, Ystart
)
or (Xs, Zs, Ys) for brevity. Likewise, the end address consists of the triple (Xend, Zend
,
Yend) or (Xe, Ze, Ye). The row, bank or column symbols may also be used individually to
refer to a value without being included in the address triple to which it belongs.
11.3.2.2.1
Address Sequencing Options
MemBIST provides several options to select the address space for MemBIST operation
and for sequencing through the address space chosen. Table 11-4 below shows how the
MemBIST addresses are generated based on various parameters that affect address
generation. Detailed explanations of the entries are found in later sections.
Intel® 6400/6402 Advanced Memory Buffer Datasheet
115
INTEL [ INTEL ]
