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631XESB 参数 Datasheet PDF下载

631XESB图片预览
型号: 631XESB
PDF下载: 下载PDF文件 查看货源
内容描述: [Multifunction Peripheral, CMOS, PBGA641, 40 X 40 MM, MICRO, BGA-641]
分类和应用:
文件页数/大小: 106 页 / 3572 K
品牌: INTEL [ INTEL ]
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Electrical Specifications  
Table 11.  
GTL+ Asynchronous Signal Group DC Specifications  
Symbol  
Parameter  
Min  
Max  
Unit Notes1  
Input Leakage  
Current  
9
ILI  
N/A  
± 200  
µA  
Output Leakage  
Current  
10  
ILO  
N/A  
6
± 200  
12  
µA  
RON  
Buffer On Resistance  
W
NOTES:  
1. Unless otherwise noted, all specifications in this table apply to all processor frequencies.  
2. V is defined as the voltage range at a receiving agent that will be interpreted as a logical low value.  
IL  
3. LINT0/INTR and LINT1/NMI use GTLREF as a reference voltage. For these two signals,  
V
= GTLREF + (0.10 * V ) and V = GTLREF – (0.10 * V ).  
IH  
TT IL TT  
4. V is defined as the voltage range at a receiving agent that will be interpreted as a logical high value.  
IH  
IH  
5. V and V  
may experience excursions above V . However, input signal drivers must comply with the signal quality  
OH  
TT  
specifications.  
6. The V referred to in these specifications refers to instantaneous V  
.
TT  
TT  
7. All outputs are open drain.  
8. The maximum output current is based on maximum current handling capability of the buffer and is not specified into  
the test load.  
9. Leakage to V with land held at V  
.
SS  
TT  
10.Leakage to V with land held at 300 mV.  
TT  
.
Table 12.  
PWRGOOD and TAP Signal Group DC Specifications  
Symbol  
VHYS  
Parameter  
Min  
Max  
Unit Notes1, 2  
3
Input Hysteresis  
120  
396  
mV  
PWRGOOD Input low-  
to-high threshold  
voltage  
0.5 * (VTT + VHYS_MIN  
+ 0.24)  
0.5 * (VTT + VHYS_MAX  
+ 0.24)  
4, 5  
V
VT+  
TAP Input low-to-high  
threshold voltage  
4
0.5 * (VTT + VHYS_MIN  
)
0.5 * (VTT + VHYS_MAX  
)
V
PWRGOOD Input high-  
to-low threshold  
voltage  
4
0.4 * VTT  
0.6 * VTT  
V
VT-  
TAP Input high-to-low  
threshold voltage  
4
0.5 * (VTT – VHYS_MAX  
)
0.5 * (VTT – VHYS_MIN  
)
V
4, 6  
VOH  
IOL  
Output High Voltage  
Output Low Current  
Input Leakage Current  
Output Leakage Current  
Buffer On Resistance  
N/A  
VTT  
22.2  
± 200  
± 200  
12  
V
7
mA  
8
ILI  
µA  
9
ILO  
µA  
RON  
6
W
NOTES:  
1. Unless otherwise noted, all specifications in this table apply to all processor frequencies.  
2. All outputs are open drain.  
3. VHYS represents the amount of hysteresis, nominally centered about 0.5 * VTT, for all TAP inputs.  
4. The V referred to in these specifications refers to instantaneous V  
.
TT  
TT  
5. 0.24 V is defined at 20% of nominal V of 1.2 V.  
TT  
6. The TAP signal group must meet the signal quality specifications.  
7. The maximum output current is based on maximum current handling capability of the buffer and is not specified into  
the test load.  
8. Leakage to Vss with land held at V  
.
TT  
9. Leakage to V with land held at 300 mV.  
TT  
26  
Datasheet  
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