Chapter 2: MAX V Architecture
2–35
I/O Structure
Programmable Pull-Up Resistor
Each MAX V device I/O pin provides an optional programmable pull-up resistor
during user mode. If you enable this feature for an I/O pin, the pull-up resistor holds
the output to the VCCIO level of the output pin’s bank.
1
1
The programmable pull-up resistor feature should not be used at the same time as the
bus-hold feature on a given I/O pin.
The programmable pull-up resistor is active during power-up, ISP, and if the device is
unprogrammed.
Programmable Input Delay
The MAX V IOE includes a programmable input delay that is activated to ensure zero
hold times. A path where a pin directly drives a register, with minimal routing
between the two, may require the delay to ensure zero hold time. However, a path
where a pin drives a register through long routing or through combinational logic
may not require the delay to achieve a zero hold time. The Quartus II software uses
this delay to ensure zero hold times when needed.
MultiVolt I/O Interface
The MAX V architecture supports the MultiVolt I/O interface feature, which allows
MAX V devices in all packages to interface with systems of different supply voltages.
The devices have one set of VCCpins for internal operation (VCCINT), and up to four
sets for input buffers and I/O output driver buffers (VCCIO), depending on the
number of I/O banks available in the devices where each set of VCCIOpins powers one
I/O bank. The 5M40Z, 5M80Z, 5M160Z, 5M240Z, and 5M570Z devices each have two
I/O banks while the 5M1270Z and 5M2210Z devices each have four I/O banks.
Connect VCCIOpins to either a 1.2-, 1.5-, 1.8-, 2.5-, or 3.3-V power supply, depending
on the output requirements. The output levels are compatible with systems of the
same voltage as the power supply (that is, when VCCIOpins are connected to a 1.5-V
power supply, the output levels are compatible with 1.5-V systems). When VCCIOpins
are connected to a 3.3-V power supply, the output high is 3.3 V and is compatible with
3.3-V or 5.0-V systems. Table 2–8 summarizes MAX V MultiVolt I/O support.
Table 2–8. MultiVolt I/O Support in MAX V Devices (Part 1 of 2) (Note 1)
Input Signal
1.5 V 1.8 V 2.5 V 3.3 V
Output Signal
5.0 V 1.2 V 1.5 V 1.8 V 2.5 V 3.3 V 5.0 V
VCCIO (V)
1.2 V
v
—
v
v
—
—
v
v
—
—
v
v
v
—
v
v
v
—
—
—
—
v
v
—
—
—
v
—
—
—
v
—
—
—
—
—
—
—
—
1.2
1.5
1.8
2.5
—
v
—
v (2) v (2)
v (3) v (3) v (3)
—
December 2010 Altera Corporation
MAX V Device Handbook
INTEL [ INTEL ]
