3–2
Chapter 3: DC and Switching Characteristics for MAX V Devices
Operating Conditions
Recommended Operating Conditions
Table 3–2 lists recommended operating conditions for the MAX V device family.
Table 3–2. Recommended Operating Conditions for MAX V Devices
Symbol
Parameter
Conditions
Minimum
Maximum
Unit
1.8-V supply voltage for internal logic and
in-system programming (ISP)
VCCINT (1)
MAX V devices
1.71
1.89
V
Supply voltage for I/O buffers, 3.3-V
operation
—
—
—
—
—
3.00
2.375
1.71
3.60
2.625
1.89
V
V
V
V
V
Supply voltage for I/O buffers, 2.5-V
operation
Supply voltage for I/O buffers, 1.8-V
operation
VCCIO (1)
Supply voltage for I/O buffers, 1.5-V
operation
1.425
1.14
1.575
1.26
Supply voltage for I/O buffers, 1.2-V
operation
VI
Input voltage
(2), (3), (4)
—
–0.5
0
4.0
VCCIO
85
V
VO
Output voltage
V
Commercial range
Industrial range
Extended range (5)
0
°C
°C
°C
TJ
Operating junction temperature
–40
–40
100
125
Notes to Table 3–2:
(1) MAX V device ISP and/or user flash memory (UFM) programming using JTAG or logic array is not guaranteed outside the recommended
operating conditions (for example, if brown-out occurs in the system during a potential write/program sequence to the UFM, Altera recommends
that you read back the UFM contents and verify it against the intended write data).
(2) The minimum DC input is –0.5 V. During transitions, the inputs may undershoot to –2.0 V for input currents less than 100 mA and periods
shorter than 20 ns.
(3) During transitions, the inputs may overshoot to the voltages shown below based on the input duty cycle. The DC case is equivalent to 100%
duty cycle. For more information about 5.0-V tolerance, refer to the Using MAX V Devices in Multi-Voltage Systems chapter.
VIN
Max. Duty Cycle
4.0 V 100% (DC)
4.1 V 90%
4.2 V 50%
4.3 V 30%
4.4 V 17%
4.5 V 10%
(4) All pins, including the clock, I/O, and JTAG pins, may be driven before VCCINT and VCCIO are powered.
(5) For the extended temperature range of 100 to 125°C, MAX V UFM programming (erase/write) is only supported using the JTAG interface. UFM
programming using the logic array interface is not guaranteed in this range.
MAX V Device Handbook
May 2011 Altera Corporation
INTEL [ INTEL ]
